screen target support + QXL inf

19 files changed, 1014 insertions, 93 deletions

diff --git a/3d_accel.h b/3d_accel.h
index 517f869..fc69391 100644
--- a/3d_accel.h
+++ b/3d_accel.h
@@ -33,7 +33,7 @@ THE SOFTWARE.
 #endif

 #endif

 

-#define API_3DACCEL_VER 20240404

+#define API_3DACCEL_VER 20240514

 

 /* function codes */

 #define OP_FBHDA_SETUP        0x110B /* VXD, DRV, ExtEscape */

@@ -62,6 +62,7 @@ THE SOFTWARE.
 #define OP_SVGA_DB_SETUP      0x200F  /* VXD */

 #define OP_SVGA_OT_SETUP      0x2010  /* VXD */

 #define OP_SVGA_FLUSHCACHE    0x2011  /* VXD */

+#define OP_SVGA_VXDCMD        0x2012  /* VXD */

 

 #define OP_VBE_VALID          0x3000 /* VXD, DRV */

 #define OP_VBE_SETMODE        0x3001 /* DRV */

@@ -118,6 +119,7 @@ typedef struct FBHDA
 #define FB_ACCEL_VMSVGA10      64

 #define FB_MOUSE_NO_BLIT      128

 #define FB_FORCE_SOFTWARE     256

+#define FB_ACCEL_VMSVGA10_ST  512

 

 /* for internal use in RING-0 by VXD only */

 BOOL FBHDA_init_hw(); 

@@ -218,6 +220,7 @@ typedef struct SVGA_DB_surface
 	DWORD gmrId; /* != 0 for GB surfaces */

 	DWORD gmrMngt; /* 1 when auto destroy MOB and region when releasing surface */

 	DWORD size; /* surface size in bytes */

+	DWORD flags;

 } SVGA_DB_surface_t;

 

 typedef struct SVGA_DB

@@ -246,6 +249,9 @@ BOOL SVGA_valid();
 #define SVGA_CB_SYNC               0x40000000UL

 #define SVGA_CB_FORCE_FIFO         0x20000000UL

 #define SVGA_CB_FORCE_FENCE        0x10000000UL

+#define SVGA_CB_PRESENT_ASYNC      0x08000000UL

+#define SVGA_CB_PRESENT_GPU        0x04000000UL

+

 // SVGA_CB_FLAG_DX_CONTEXT

 

 BOOL SVGA_setmode(DWORD w, DWORD h, DWORD bpp);

@@ -304,6 +310,9 @@ SVGA_OT_info_entry_t *SVGA_OT_setup();
 

 void SVGA_flushcache();

 

+BOOL SVGA_vxdcmd(DWORD cmd);

+#define SVGA_CMD_INVALIDATE_FB 1

+

 #endif /* SVGA */

 

 /*

diff --git a/dbgprint.c b/dbgprint.c
index f8a9640..a8286c4 100644
--- a/dbgprint.c
+++ b/dbgprint.c
@@ -64,7 +64,7 @@ static int serial_inited = 0;
 static void init_serial() {

    outp(INFO_PORT + 1, 0x00);    // Disable all interrupts

    outp(INFO_PORT + 3, 0x80);    // Enable DLAB (set baud rate divisor)

-   outp(INFO_PORT + 0, 0x12);    // Set divisor to 3 (lo byte) 38400 baud

+   outp(INFO_PORT + 0, 0x01);    // Set divisor to 3 (lo byte) 38400 baud 0x0C = 9600, 0x01 = 115200

    outp(INFO_PORT + 1, 0x00);    //                  (hi byte)

    outp(INFO_PORT + 3, 0x03);    // 8 bits, no parity, one stop bit

    outp(INFO_PORT + 2, 0xC7);    // Enable FIFO, clear them, with 14-byte threshold

diff --git a/enable.c b/enable.c
index 9ae2bf4..d1e7cf7 100644
--- a/enable.c
+++ b/enable.c
@@ -269,17 +269,17 @@ UINT WINAPI __loadds Enable( LPVOID lpDevice, UINT style, LPSTR lpDeviceType,
         lpEng->deReserved1    = 0;

         lpEng->delpPDevice    = 0;

         lpEng->deBitsOffset   = 0;

-        lpEng->deBitsSelector = ScreenSelector;

+        lpEng->deBitsSelector = ((DWORD)hda->vram_pm16) >> 16;

         lpEng->deBitmapInfo   = lpInfo;

         lpEng->deVersion      = 0x400;

         lpEng->deBeginAccess  = BeginAccess_VXD;

         lpEng->deEndAccess    = EndAccess_VXD;

 #else

         /* Call the DIB Engine to set up the PDevice. */

-        dbg_printf( "lpInfo=%WP lpDevice=%WP lpColorTable=%WP wFlags=%X ScreenSelector=%X\n", lpInfo, lpDevice, lpColorTable, wFlags, ScreenSelector );

+        dbg_printf( "lpInfo=%WP lpDevice=%WP lpColorTable=%WP wFlags=%X ScreenSelector=%X\n", lpInfo, lpDevice, lpColorTable, wFlags, ((DWORD)hda->vram_pm16) >> 16);

         {

             DWORD           dwRet;

-            dwRet = CreateDIBPDeviceX( lpInfo, lpDevice, ScreenSelector :> 0, wFlags );

+            dwRet = CreateDIBPDeviceX( lpInfo, lpDevice, hda->vram_pm16, wFlags );

             if( !dwRet ) {

                 dbg_printf( "Enable: CreateDIBPDevice failed!\n" );

                 return( 0 );

diff --git a/makefile b/makefile
index 2ca5380..e896f1a 100644
--- a/makefile
+++ b/makefile
@@ -7,7 +7,7 @@ OBJS = &
 OBJS += &

   dbgprint32.obj svga.obj pci.obj vxd_fbhda.obj vxd_lib.obj vxd_main.obj &

   vxd_main_qemu.obj vxd_main_svga.obj vxd_svga.obj vxd_vdd.obj vxd_vdd_qemu.obj &

-  vxd_vdd_svga.obj vxd_vbe.obj vxd_vbe_qemu.obj vxd_mouse.obj

+  vxd_vdd_svga.obj vxd_vbe.obj vxd_vbe_qemu.obj vxd_mouse.obj vxd_svga_st.obj

 

 INCS = -I$(%WATCOM)\h\win -Iddk -Ivmware

 

@@ -34,7 +34,7 @@ FIXER_CC  = wcl386 -q drvfix.c -fe=$(FIXER_EXE)
 #FLAGS += -DHWBLT

 

 # Set DBGPRINT to add debug printf logging.

-#DBGPRINT = 1

+DBGPRINT = 1

 

 !ifdef DBGPRINT

 FLAGS += -DDBGPRINT

@@ -160,6 +160,9 @@ vxd_mouse.obj : vxd_mouse.c .autodepend
 vxd_svga.obj : vxd_svga.c .autodepend

 	$(CC32) $(CFLAGS32) $(INCS) $(FLAGS) $<

 

+vxd_svga_st.obj : vxd_svga_st.c .autodepend

+	$(CC32) $(CFLAGS32) $(INCS) $(FLAGS) $<

+

 vxd_vbe.obj : vxd_vbe.c .autodepend

 	$(CC32) $(CFLAGS32) $(INCS) $(FLAGS) $<

 

@@ -422,6 +425,7 @@ file pci.obj
 file vxd_fbhda.obj

 file vxd_lib.obj

 file vxd_svga.obj

+file vxd_svga_st.obj

 file vxd_vdd_svga.obj

 file vxd_mouse.obj

 segment '_LTEXT' PRELOAD NONDISCARDABLE 

diff --git a/minidrv.h b/minidrv.h
index 90687f3..7932368 100644
--- a/minidrv.h
+++ b/minidrv.h
@@ -68,7 +68,10 @@ extern void dbg_printf( const char *s, ... );
 #endif

 

 extern LPDIBENGINE lpDriverPDevice; /* DIB Engine PDevice. */

-extern WORD ScreenSelector;         /* Selector of video memory. */

+#if 0

+extern WORD ScreenSelector;         /* Selector of video memory.  */

+// JH: ^removed, use hda->vram_pm16 instead

+#endif

 extern WORD wPalettized;            /* Non-zero if palettized device. */

 extern WORD wPDeviceFlags;          /* Current GDI device flags. */

 extern WORD wDpi;                   /* Current DPI. */

diff --git a/modes.c b/modes.c
index 523e69c..53819be 100644
--- a/modes.c
+++ b/modes.c
@@ -52,14 +52,12 @@ THE SOFTWARE.
 WORD wScreenX       = 0;

 WORD wScreenY       = 0;

 WORD BitBltDevProc  = 0;

-WORD ScreenSelector = 0;

 WORD wPDeviceFlags  = 0;

 

 /* FBHDA structure pointers */

 FBHDA_t __far * hda = NULL;

 DWORD hda_linear = 0;

 

-DWORD    dwVideoMemorySize = 0;  /* Installed VRAM in bytes. */

  WORD    wScreenPitchBytes = 0;  /* Current scanline pitch. */

 

 /* On Entry:

@@ -231,12 +229,6 @@ void __far RestoreDesktopMode( void );
 int PhysicalEnable( void )

 {

     DWORD   dwRegRet;

-

-    if( !ScreenSelector ) {

-        dwVideoMemorySize = hda->vram_size;

-

-        dbg_printf( "PhysicalEnable: Hardware detected, dwVideoMemorySize=%lX\n", dwVideoMemorySize );

-    }

     

     dbg_printf("PhysicalEnable: continue with %ux%u\n", wScrX, wScrY);

     if( !IsModeOK( wScrX, wScrY, wBpp ) ) {

@@ -250,11 +242,6 @@ int PhysicalEnable( void )
         dbg_printf( "PhysicalEnable: SetDisplayMode failed! wScrX=%u wScrY=%u wBpp=%u\n", wScrX, wScrY, wBpp );

         return( 0 );

     }

-

-    /* Allocate an LDT selector for the screen. */

-    if( !ScreenSelector ) {

-    	  ScreenSelector = ((DWORD)hda->vram_pm16) >> 16;

-    }

     

     /* NB: Currently not used. DirectDraw would need the segment base. */

     /* JH: we need it for FIFO (SVGA) or direct FB rendering, but retuned by AllocLinearSelector in one CALL */

@@ -298,7 +285,6 @@ UINT WINAPI __loadds ValidateMode( DISPVALMODE FAR *lpValMode )
 

     //dbg_printf( "ValidateMode: X=%u Y=%u bpp=%u\n", lpValMode->dvmXRes, lpValMode->dvmYRes, lpValMode->dvmBpp );

     do {

-        if( !ScreenSelector ) {

 #ifdef SVGA

             /* Check if we have SVGA HW */

             if(!SVGA_valid())

@@ -316,8 +302,6 @@ UINT WINAPI __loadds ValidateMode( DISPVALMODE FAR *lpValMode )
               break;

             }

 #endif

-            dwVideoMemorySize = hda->vram_size;

-        }

 

         if( !IsModeOK( lpValMode->dvmXRes, lpValMode->dvmYRes, lpValMode->dvmBpp ) ) {

             rc = VALMODE_NO_NOMEM;

diff --git a/vmdisp9x.inf b/vmdisp9x.inf
index 111b0e5..3935095 100644
--- a/vmdisp9x.inf
+++ b/vmdisp9x.inf
@@ -3,6 +3,7 @@
 ;              VirtualBox SVGA Win9x display driver

 ;              VMWare SVGA-II  Win9x display driver

 ;              QEMU STD        Win9x display driver

+;              QEMU QXL        Win9x display driver

 ; Copyright 2012-2022, The OS/2 Museum

 ;           2023-2024, Jaroslav Hensl

 

@@ -31,6 +32,8 @@ vmwsmini.drv=1
 vmwsmini.vxd=1

 qemumini.drv=1

 qemumini.vxd=1

+qxlmini.drv=1

+qxlmini.vxd=1

 ;mesa:mesa3d.dll=1

 ;mesa:vmwsgl32.dll=1

 ;openglide:glide2x.dll=1

@@ -65,6 +68,7 @@ qemumini.vxd=1
 %VBoxVideoVM2.DeviceDesc%=VMSvga, PCI\VEN_15AD&DEV_0405&SUBSYS_040515AD

 ;svga3:%VBoxVideoVM3.DeviceDesc%=VMSvga, PCI\VEN_15AD&DEV_0406&SUBSYS_040615AD

 %QemuStd.DeviceDesc%=Qemu, PCI\VEN_1234&DEV_1111

+%QemuQXL.DeviceDesc%=QXL, PCI\VEN_1B36&DEV_0100

 

 [VBox]

 CopyFiles=VBox.Copy,Dx.Copy,DX.CopyBackup,Voodoo.Copy

@@ -76,6 +80,11 @@ CopyFiles=Qemu.Copy,Dx.Copy,DX.CopyBackup,Voodoo.Copy
 DelReg=VM.DelReg

 AddReg=Qemu.AddReg,VM.AddReg,DX.addReg

 

+[QXL]

+CopyFiles=QXL.Copy,Dx.Copy,DX.CopyBackup,Voodoo.Copy

+DelReg=VM.DelReg

+AddReg=QXL.AddReg,VM.AddReg,DX.addReg

+

 [VBoxSvga]

 CopyFiles=VMSvga.Copy,Dx.Copy,DX.CopyBackup,Voodoo.Copy

 DelReg=VM.DelReg

@@ -98,6 +107,12 @@ qemumini.vxd,,,0x00000004
 ;mesa:mesa3d.dll,,,0x00000004

 ;vmhal:vmhal9x.dll,,,0x00000004

 

+[QXL.Copy]

+qxlmini.drv,,,0x00000004

+qxlmini.vxd,,,0x00000004

+;mesa:mesa3d.dll,,,0x00000004

+;vmhal:vmhal9x.dll,,,0x00000004

+

 [VMSvga.Copy]

 vmwsmini.drv,,,0x00000004

 vmwsmini.vxd,,,0x00000004

@@ -139,6 +154,11 @@ HKR,DEFAULT,drv,,qemumini.drv
 HKR,DEFAULT,minivdd,,qemumini.vxd

 HKR,DEFAULT,Mode,,"8,640,480"

 

+[QXL.AddReg]

+HKR,DEFAULT,drv,,qxlmini.drv

+HKR,DEFAULT,minivdd,,qxlmini.vxd

+HKR,DEFAULT,Mode,,"32,640,480"

+

 [VBox.AddReg]

 HKR,DEFAULT,drv,,boxvmini.drv

 HKR,DEFAULT,minivdd,,boxvmini.vxd

@@ -236,8 +256,8 @@ HKLM,Software\Microsoft\Windows\CurrentVersion\OpenGLdrivers,QEMUFX,2,"qmfxgl32.
 ;mesa:HKLM,Software\Microsoft\Windows\CurrentVersion\OpenGLdrivers,SOFTWARE,2,"mesa3d.dll"

 ;mesa:HKLM,Software\Microsoft\Windows\CurrentVersion\OpenGLdrivers,VMWSVGA,2,"vmwsgl32.dll"

 ;mesa:HKLM,Software\Mesa3D\global,LP_NATIVE_VECTOR_WIDTH,,128

-;mesa:HKLM,Software\Mesa3D\global,SVGA_CLEAR_DX_FLAGS,,1

-;mesa:HKLM,Software\Mesa3D\global,SVGA_GMR_LIMIT,,160

+;mesa:HKLM,Software\Mesa3D\global,SVGA_CLEAR_DX_FLAGS,,0

+;mesa:HKLM,Software\Mesa3D\global,SVGA_GMR_LIMIT,,256

 

 [DX.addReg]

 ;mefix:HKLM,System\CurrentControlSet\Control\SessionManager\KnownDLLs,DDRAW,2,"ddrawme.dll"

@@ -377,3 +397,4 @@ VBoxVideoSVGA.DeviceDesc="VBox SVGA PCI Adapter"
 VBoxVideoVM2.DeviceDesc="VMWare SVGA-II PCI Adapter"

 VBoxVideoVM3.DeviceDesc="VMWare SVGA-III PCI Adapter"

 QemuStd.DeviceDesc="QEMU STD VGA PCI Adapter"

+QemuQXL.DeviceDesc="QEMU QXL VGA PCI Adapter"

diff --git a/vxd_fbhda.c b/vxd_fbhda.c
index 3e781b4..0fe8f5b 100644
--- a/vxd_fbhda.c
+++ b/vxd_fbhda.c
@@ -80,15 +80,6 @@ FBHDA_t *FBHDA_setup()
 	return hda;

 }

 

-void FBHDA_access_begin(DWORD flags)

-{

-	//Wait_Semaphore(hda_sem, 0);

-	if(fb_lock_cnt++ == 0)

-	{

-		mouse_erase();

-	}

-}

-

 void FBHDA_clean()

 {

 	FBHDA_access_begin(0);

diff --git a/vxd_lib.c b/vxd_lib.c
index 9fa83db..d40c68c 100644
--- a/vxd_lib.c
+++ b/vxd_lib.c
@@ -228,6 +228,22 @@ void __cdecl Signal_Semaphore(ULONG SemHandle)
 	_asm pop eax

 }

 

+void __cdecl Resume_VM(ULONG VM)

+{

+	static ULONG sVM;

+	sVM = VM;

+	

+	_asm push ebx

+	_asm mov ebx, [sVM]

+	VMMCall(Resume_VM);

+	_asm pop ebx	

+}

+

+void Release_Time_Slice()

+{

+	VMMCall(Release_Time_Slice);

+}

+

 void __cdecl *Map_Flat(BYTE SegOffset, BYTE OffOffset)

 {

 	static BYTE sSegOffset;

diff --git a/vxd_lib.h b/vxd_lib.h
index 9bf406e..7c9aef5 100644
--- a/vxd_lib.h
+++ b/vxd_lib.h
@@ -51,6 +51,9 @@ void __cdecl *Map_Flat(BYTE SegOffset, BYTE OffOfset);
 void __cdecl Install_IO_Handler(DWORD port, DWORD callback);

 DWORD __cdecl _GetFreePageCount(DWORD *pLockablePages);

 

+void __cdecl Resume_VM(ULONG VM);

+void Release_Time_Slice();

+

 void __cdecl _BuildDescriptorDWORDs(ULONG DESCBase, ULONG DESCLimit, ULONG DESCType, ULONG DESCSize, ULONG flags, DWORD *outDescHigh, DWORD *outDescLow);

 void __cdecl _Allocate_LDT_Selector(ULONG vm, ULONG DescHigh, ULONG DescLow, ULONG Count, ULONG flags, DWORD *outFirstSelector, DWORD *outSelectorTable);

 void __cdecl _Allocate_GDT_Selector(ULONG DescHigh, ULONG DescLow, ULONG flags, DWORD *outFirstSelector, DWORD *outSelectorTable);

diff --git a/vxd_main.c b/vxd_main.c
index 5be084a..ff29170 100644
--- a/vxd_main.c
+++ b/vxd_main.c
@@ -582,6 +582,9 @@ DWORD __stdcall Device_IO_Control_proc(DWORD vmhandle, struct DIOCParams *params
 		case OP_SVGA_FLUSHCACHE:

 			SVGA_flushcache();

 			return 0;

+		case OP_SVGA_VXDCMD:

+			outBuf[0] = (DWORD)SVGA_vxdcmd(inBuf[0]);

+			return 0;

 #endif /* SVGA */

 	}

 		

diff --git a/vxd_mouse.c b/vxd_mouse.c
index ccf0595..1c6eb76 100644
--- a/vxd_mouse.c
+++ b/vxd_mouse.c
@@ -96,7 +96,7 @@ BOOL mouse_load()
 	DWORD cbw;

 	

 	if(!mouse_buffer_mem) return FALSE;

-	

+

 	cur = (CURSORSHAPE*)mouse_buffer_mem;

 	

 	/* erase cursor if present */

diff --git a/vxd_strings.h b/vxd_strings.h
index 64bc36b..3d48910 100644
--- a/vxd_strings.h
+++ b/vxd_strings.h
@@ -125,6 +125,11 @@ DSTR(dbg_register, "register: ebx = %ld, ecx = %ld, VM = %lX\n");
 

 DSTR(dbg_map_pm16_qw, "map_pm16: high=%lX, low=%lX\n");

 

+DSTR(dbg_lock_cb, "Lock CB buffer: %ld (line: %ld)\n");

+DSTR(dbg_lock_fb, "Lock FB buffer: %ld (line: %ld)\n");

+

+DSTR(dbg_cpu_lock, "surface cpu lock for SID: %ld\n");

+

 #undef DSTR

 

 #endif

diff --git a/vxd_svga.c b/vxd_svga.c
index d64f440..ad3af2a 100644
--- a/vxd_svga.c
+++ b/vxd_svga.c
@@ -38,6 +38,8 @@ THE SOFTWARE.
 

 #include "code32.h"

 

+#include "vxd_svga.h"

+

 #include "vxd_strings.h"

 

 /*

@@ -123,7 +125,7 @@ static BOOL cb_support = FALSE;
 static BOOL cb_context0 = FALSE;

 

 /* for GPU9 is FIFO more stable (VMWARE) or faster (VBOX) */

-static DWORD prefer_fifo = 1; 

+static DWORD prefer_fifo = 1;

 

 static BOOL SVGA_is_valid = FALSE;

 

@@ -131,12 +133,18 @@ static volatile SVGACBHeader *last_cb = NULL;
 

 static uint64 cb_next_id = {0, 0};

 static DWORD fence_next_id = 1;

-static void *cmdbuf = NULL;

+void *cmdbuf = NULL;

+static DWORD cb_sem;

 

 static svga_cache_state_t cache_state = {0, 0};

 

 static BOOL cache_enabled = FALSE;

 

+/* guest frame buffer is dirty */

+static BOOL ST_FB_invalid = FALSE;

+

+static DWORD present_fence = 0;

+

 /* object table for GPU10 */

 static SVGA_OT_info_entry_t otable_setup[SVGA_OTABLE_DX_MAX] = {

 	{0, NULL, RoundToPages(SVGA3D_MAX_MOBS*sizeof(SVGAOTableMobEntry))*P_SIZE,                 0}, /* SVGA_OTABLE_MOB */

@@ -379,7 +387,7 @@ static void SVGA_Flush_CB_critical()
 	SVGA_Flush();

 }

 

-static void wait_for_cmdbuf()

+void wait_for_cmdbuf()

 {

 	SVGACBHeader *cb = ((SVGACBHeader *)cmdbuf)-1;

 	WAIT_FOR_CB(cb, 0);

@@ -500,6 +508,14 @@ static void SVGA_DB_alloc()
 	}

 }

 

+SVGA_DB_surface_t *SVGA_GetSurfaceInfo(uint32 sid)

+{

+	if(sid > 0 && sid < SVGA3D_MAX_SURFACE_IDS)	

+		return &(svga_db->surfaces[sid-1]);

+	

+	return NULL;

+}

+

 SVGA_DB_t *SVGA_DB_setup()

 {

 	return svga_db;

@@ -547,21 +563,33 @@ void SVGA_fence_query(DWORD FBPTR ptr_fence_passed, DWORD FBPTR ptr_fence_last)
 	}

 }

 

-void SVGA_fence_wait(DWORD fence_id)

+static BOOL SVGA_fence_is_passed(DWORD fence_id)

 {

 	DWORD last_pased;

 	DWORD last_fence;

-	DWORD cnt = 0;

 	

-	for(cnt = 0; cnt < SVGA_TIMEOUT; cnt++)

+	SVGA_fence_query(&last_pased, &last_fence);

+	if(fence_id > last_fence)

 	{

-		SVGA_fence_query(&last_pased, &last_fence);

-		if(fence_id > last_fence)

-		{

-			break;

-		}

+		return TRUE;

+	}

 		

-		if(fence_id <= last_pased)

+	if(fence_id <= last_pased)

+	{

+		return TRUE;

+	}

+	

+	return FALSE;

+}

+

+void SVGA_fence_wait(DWORD fence_id)

+{

+	//DWORD cnt = 0;

+	

+	//for(cnt = 0; cnt < SVGA_TIMEOUT; cnt++)

+	for(;;)

+	{

+		if(SVGA_fence_is_passed(fence_id))

 		{

 			break;

 		}

@@ -569,11 +597,11 @@ void SVGA_fence_wait(DWORD fence_id)
 		SVGA_Sync();

 	}

 	

-	

+	/*

 	if(cnt == SVGA_TIMEOUT)

 	{

 		SVGA_Flush();

-	}

+	}*/

 }

 

 /**

@@ -621,7 +649,7 @@ void SVGA_CMB_free(DWORD *cmb)
 	End_Critical_Section();

 }

 

-static void *SVGA_cmd_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize)

+void *SVGA_cmd_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize)

 {

 	DWORD pp = (*pOffset)/sizeof(DWORD);

 	buf[pp] = cmd;

@@ -630,7 +658,7 @@ static void *SVGA_cmd_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize)
 	return (void*)(buf + pp + 1);

 }

 

-static void *SVGA_cmd3d_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize)

+void *SVGA_cmd3d_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize)

 {

 	DWORD pp = (*pOffset)/sizeof(DWORD);

 	buf[pp] = cmd;

@@ -650,11 +678,52 @@ static void SVGA_cb_id_inc()
 	}

 }

 

+#ifdef DBGPRINT

+#include "vxd_svga_debug.h"

+#endif

+

 void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR status, DWORD flags, DWORD DXCtxId)

 {

+	DWORD fence = 0;

 	SVGACBHeader *cb = ((SVGACBHeader *)cmb)-1;

+		

+	if(status)

+	{

+		cb->status = SVGA_CB_STATUS_NONE;

+		status->sStatus = SVGA_PROC_NONE;

+		status->qStatus = (volatile DWORD*)&cb->status;

+	}

+	

 	Begin_Critical_Section(0);

 	

+#ifdef DBGPRINT

+//	debug_cmdbuf(cmb, cmb_size);

+//	debug_cmdbuf_trace(cmb, cmb_size, SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);

+//		debug_draw(cmb, cmb_size);

+#endif

+

+	if(flags & SVGA_CB_PRESENT_ASYNC)

+	{

+		if(present_fence != 0)

+		{

+			SVGA_fence_wait(present_fence);

+		}

+		

+		flags |= SVGA_CB_FORCE_FENCE;

+	}

+	else if(present_fence)

+	{

+		if(SVGA_fence_is_passed(present_fence))

+		{

+			present_fence = 0;

+		}

+	}

+	

+	if(flags & SVGA_CB_PRESENT_GPU)

+	{

+		ST_FB_invalid = TRUE;

+	}

+	

 	if(  /* CB are supported and enabled */

 		cb_support &&

 		(cb_context0 || (flags & SVGA_CB_USE_CONTEXT_DEVICE)) &&

@@ -662,7 +731,6 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 	)

 	{

 		DWORD cbhwctxid = SVGA_CB_CONTEXT_0;

-		DWORD fence = 0;

 		

 		if(flags & SVGA_CB_USE_CONTEXT_DEVICE)

 		{

@@ -689,7 +757,7 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 			}

 		}

 		else

-		{

+		{			

 			cb->status = SVGA_CB_STATUS_NONE;

 			cb->errorOffset = 0;

 			cb->offset = 0; /* VMware modified this, needs to be clear */

@@ -708,14 +776,7 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 			cb->id.low = cb_next_id.low;

 			cb->id.hi  = cb_next_id.hi;

 			cb->length = cmb_size;

-			

-#if 0

-			/* wait for last CB to complete */

-			if(last_cb)

-			{

-				WAIT_FOR_CB(last_cb, 0);

-			}

-#endif

+						

 			SVGA_WriteReg(SVGA_REG_COMMAND_HIGH, 0); // high part of 64-bit memory address...

 			SVGA_WriteReg(SVGA_REG_COMMAND_LOW, (cb->ptr.pa.low - sizeof(SVGACBHeader)) | cbhwctxid);

 			SVGA_Sync(); /* notify HV to read registers (VMware needs it) */

@@ -725,7 +786,7 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 			if(flags & SVGA_CB_SYNC)

 			{

 				WAIT_FOR_CB(cb, 0);

-

+				

 				if(cb->status != SVGA_CB_STATUS_COMPLETED)

 				{

 					dbg_printf(dbg_cmd_error, cb->status, cmb[0], cb->errorOffset);

@@ -763,7 +824,6 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 		DWORD *ptr = cmb;

 		DWORD dwords = cmb_size/sizeof(DWORD);

 		DWORD nextCmd, max, min;

-		DWORD fence;

 		

 		/* insert fence CMD */

 		fence = SVGA_fence_get();

@@ -820,11 +880,33 @@ void SVGA_CMB_submit(DWORD FBPTR cmb, DWORD cmb_size, SVGA_CMB_status_t FBPTR st
 		status->fifo_fence_last = SVGA_fence_passed();

 	}

 	

+	if(flags & SVGA_CB_PRESENT_ASYNC)

+	{

+		present_fence = fence;

+	}

+	

 	End_Critical_Section();

 	

 	//dbg_printf(dbg_cmd_off, cmb[0]);

 }

 

+BOOL SVGA_vxdcmd(DWORD cmd)

+{

+	switch(cmd)

+	{

+		case SVGA_CMD_INVALIDATE_FB:

+			ST_FB_invalid = TRUE;

+			return TRUE;

+	}

+	

+	return FALSE;

+}

+

+

+static DWORD fb_pm16 = 0;

+static DWORD st_pm16 = 0;

+static DWORD st_address = 0;

+

 /**

  * Init SVGA-II hardware

  * return TRUE on success

@@ -953,16 +1035,45 @@ BOOL SVGA_init_hw()
 			}

 		}

 		

-		SVGA_DB_alloc();

+		cb_sem = Create_Semaphore(1);

 		

-		/* fill address in FBHDA */

-		hda->vram_pm32 = (void*)gSVGA.fbLinear;

-		hda->vram_size = gSVGA.vramSize;

- 		memcpy(hda->vxdname, SVGA_vxd_name, sizeof(SVGA_vxd_name));

+		SVGA_DB_alloc();

 		

 		/* allocate CB for this driver */

 		cmdbuf = SVGA_CMB_alloc();

 		

+		/* vGPU10 */

+		if(gb_support)

+		{

+			SVGA_OTable_load();

+			

+			if(st_memory_allocate(64*1024*1024, &st_address))

+			{

+				st_used = TRUE;

+			}

+		}

+		

+		/* allocate 16bit selector for FB */

+		fb_pm16 = map_pm16(1, gSVGA.fbLinear, gSVGA.vramSize);

+		

+		/* fill address in FBHDA */

+		if(st_used)

+		{

+			st_pm16 = map_pm16(1, st_address, 64*1024*1024);

+			

+			hda->vram_pm32 = (void*)st_address;

+			hda->vram_size = 64*1024*1024;

+			hda->vram_pm16 = st_pm16;

+		}

+		else

+		{

+			hda->vram_pm32 = (void*)gSVGA.fbLinear;

+			hda->vram_size = gSVGA.vramSize;

+			hda->vram_pm16 = fb_pm16;

+		}

+		

+ 		memcpy(hda->vxdname, SVGA_vxd_name, sizeof(SVGA_vxd_name));

+		

 		hda->flags |= FB_ACCEL_VMSVGA;

 		

 		if(cb_support && gb_support)

@@ -1245,7 +1356,7 @@ BOOL SVGA_region_create(SVGA_region_info_t *rinfo)
 	

 	End_Critical_Section();

 	

-	dbg_printf(dbg_gmr_succ, rinfo->region_id, rinfo->size);

+	//dbg_printf(dbg_gmr_succ, rinfo->region_id, rinfo->size);

 	

 	return TRUE;

 }

@@ -1312,7 +1423,7 @@ void SVGA_region_free(SVGA_region_info_t *rinfo)
 	}

 	End_Critical_Section();

 		

-	dbg_printf(dbg_pagefree_end, rinfo->region_id, rinfo->size, saved_in_cache);

+	//dbg_printf(dbg_pagefree_end, rinfo->region_id, rinfo->size, saved_in_cache);

 		

 	rinfo->address        = NULL;

 	rinfo->region_address = NULL;

@@ -1467,7 +1578,7 @@ BOOL SVGA3D_Init(void)
 	return TRUE;

 }

 

-static DWORD SVGA_pitch(DWORD width, DWORD bpp)

+DWORD SVGA_pitch(DWORD width, DWORD bpp)

 {

 	DWORD bp = (bpp + 7) / 8;

 	return (bp * width + 3) & 0xFFFFFFFC;

@@ -1531,6 +1642,46 @@ static void SVGA_defineScreen(DWORD w, DWORD h, DWORD bpp)
 }

 

 /**

+ * Apply tables to VGPU

+ **/

+void SVGA_OTable_load()

+{

+	DWORD i;

+	DWORD cmd_offset = 0;

+	SVGA3dCmdSetOTableBase *cmd;

+

+	SVGA_OT_info_entry_t *ot = SVGA_OT_setup();

+	if(ot == NULL)

+	{

+		return;

+	}

+	

+	wait_for_cmdbuf();

+

+	for(i = SVGA_OTABLE_MOB; i < SVGA_OTABLE_DX_MAX; i++)

+	{

+		SVGA_OT_info_entry_t *entry = &(ot[i]);

+

+		if((entry->flags & SVGA_OT_FLAG_ACTIVE) == 0)

+		{

+			if(entry->size > 0)

+			{

+				cmd = SVGA_cmd3d_ptr(cmdbuf, &cmd_offset, SVGA_3D_CMD_SET_OTABLE_BASE, sizeof(SVGA3dCmdSetOTableBase));

+				cmd->type = i;

+				cmd->baseAddress = entry->phy / P_SIZE;

+				cmd->sizeInBytes = entry->size;

+			  cmd->validSizeInBytes = 0;

+			  cmd->ptDepth = SVGA3D_MOBFMT_RANGE;

+

+			  entry->flags |= SVGA_OT_FLAG_ACTIVE;

+			}

+		}

+	}

+

+	SVGA_CMB_submit(cmdbuf, cmd_offset, NULL, SVGA_CB_SYNC, 0);

+}

+

+/**

  * Test if display mode is supported

  **/

 BOOL SVGA_validmode(DWORD w, DWORD h, DWORD bpp)

@@ -1596,8 +1747,26 @@ BOOL SVGA_setmode(DWORD w, DWORD h, DWORD bpp)
       

 	/* stop command buffer context 0 */

 	SVGA_CB_stop();

-            

-	SVGA_SetModeLegacy(w, h, bpp); /* setup by legacy registry */

+	

+	/* delete old screen at its objects */

+	if(SVGA_hasAccelScreen())

+	{

+		if(st_used)

+		{

+			st_destroyScreen();

+		}

+	}

+  

+   /* setup by legacy registry */

+  if(st_useable(bpp))

+  {

+		SVGA_SetModeLegacy(w, h, 32);

+	}

+	else

+	{

+		SVGA_SetModeLegacy(w, h, bpp);

+	}

+	

 	SVGA_Flush_CB_critical(); /* make sure, that is really set */

 	

 	has3D = SVGA3D_Init();

@@ -1605,13 +1774,14 @@ BOOL SVGA_setmode(DWORD w, DWORD h, DWORD bpp)
 	/* setting screen by fifo, this method is required in VB 6.1 */

 	if(SVGA_hasAccelScreen())

 	{

-		SVGA_defineScreen(w, h, bpp);

+		if(!st_useable(bpp))

+		{

+			SVGA_defineScreen(w, h, bpp);

+		}

+		

 		SVGA_Flush_CB_critical();

 	}

 	

-	/* start command buffer context 0 */

-	SVGA_CB_start();

-     

 	/*

 	 * JH: this is a bit stupid = all SVGA command cannot work with non 32 bpp. 

 	 * SVGA_CMD_UPDATE included. So if we're working in 32 bpp, we'll disable

@@ -1621,26 +1791,60 @@ BOOL SVGA_setmode(DWORD w, DWORD h, DWORD bpp)
 	 * QEMU hasn't SVGA_REG_TRACES register and framebuffer cannot be se to

 	 * 16 or 8 bpp = we supporting only 32 bpp moders if we're running under it.

 	 */

-	if(bpp == 32)

+	if(!st_useable(bpp))

 	{

-		SVGA_WriteReg(SVGA_REG_TRACES, FALSE);

+		if(bpp == 32)

+		{

+			SVGA_WriteReg(SVGA_REG_TRACES, FALSE);

+		}

+		else

+		{

+			SVGA_WriteReg(SVGA_REG_TRACES, TRUE);

+		}

 	}

 	else

 	{

-		SVGA_WriteReg(SVGA_REG_TRACES, TRUE);

+		SVGA_WriteReg(SVGA_REG_TRACES, FALSE);

 	}

-      

+	

 	SVGA_WriteReg(SVGA_REG_ENABLE, TRUE);

 	SVGA_Sync();

+		

 	SVGA_Flush_CB_critical();

 	

+	/* start command buffer context 0 */

+	SVGA_CB_start();

+	

+	if(st_useable(bpp))

+	{

+		st_defineScreen(w, h, bpp);

+		hda->flags |= FB_ACCEL_VMSVGA10_ST;

+	}

+	else

+	{

+		hda->flags &= ~((DWORD)FB_ACCEL_VMSVGA10_ST);

+	}

+	

+	if(st_useable(bpp))

+	{		

+		hda->vram_pm32 = (void*)st_address;

+		hda->vram_size = 64*1024*1024;

+		hda->vram_pm16 = st_pm16;

+	}

+	else

+	{

+		hda->vram_pm32 = (void*)gSVGA.fbLinear;

+		hda->vram_size = gSVGA.vramSize;

+		hda->vram_pm16 = fb_pm16;

+	}

+

 	hda->width   = SVGA_ReadReg(SVGA_REG_WIDTH);

 	hda->height  = SVGA_ReadReg(SVGA_REG_HEIGHT);

 	hda->bpp     = SVGA_ReadReg(SVGA_REG_BITS_PER_PIXEL);

 	hda->pitch   = SVGA_ReadReg(SVGA_REG_BYTES_PER_LINE);

 	hda->stride  = hda->height * hda->pitch;

 	hda->surface = 0;

-		

+

 	if(has3D && SVGA_GetDevCap(SVGA3D_DEVCAP_3D) > 0)

 	{

 		hda->flags |= FB_ACCEL_VMSVGA3D;

@@ -1800,34 +2004,95 @@ BOOL FBHDA_swap(DWORD offset)
 	return FALSE;

 }

 

+void FBHDA_access_begin(DWORD flags)

+{

+	Wait_Semaphore(hda_sem, 0);

+	

+	if(fb_lock_cnt++ == 0)

+	{

+		BOOL readback = FALSE;

+				

+		if(present_fence != 0)

+		{

+			SVGA_fence_wait(present_fence);

+//			readback = TRUE;

+		}

+		

+		if(ST_FB_invalid)

+		{

+			readback = TRUE;		

+			ST_FB_invalid = FALSE;

+		}

+		

+		if(readback)

+		{

+			if(st_useable(hda->bpp))

+			{

+				DWORD cmd_offset = 0;

+				SVGA3dCmdReadbackGBSurface *gbreadback;

+				

+				wait_for_cmdbuf();

+				

+				gbreadback = SVGA_cmd3d_ptr(cmdbuf, &cmd_offset, SVGA_3D_CMD_READBACK_GB_SURFACE, sizeof(SVGA3dCmdReadbackGBSurface));

+				gbreadback->sid = ST_SURFACE_ID;

+				SVGA_CMB_submit(cmdbuf, cmd_offset, NULL, SVGA_CB_SYNC, 0);

+			}

+		}

+		

+		mouse_erase();

+	}

+	

+	Signal_Semaphore(hda_sem);

+}

+

 void FBHDA_access_end(DWORD flags)

 {

-	//dbg_printf(dbg_update, hda->width, hda->height, hda->bpp);

+	Wait_Semaphore(hda_sem, 0);

+

 	fb_lock_cnt--;

 	if(fb_lock_cnt < 0) fb_lock_cnt = 0;

 	

 	if(fb_lock_cnt == 0)

 	{

-		mouse_blit();

-		

-	  if(hda->bpp == 32)

+		mouse_blit();		

+		if(st_useable(hda->bpp))

+		{

+			SVGA3dCmdUpdateGBSurface *gbupdate;

+			SVGA3dCmdUpdateGBScreenTarget *stupdate;

+			DWORD cmd_offset = 0;

+

+		 	wait_for_cmdbuf();

+

+			gbupdate = SVGA_cmd3d_ptr(cmdbuf, &cmd_offset, SVGA_3D_CMD_UPDATE_GB_SURFACE, sizeof(SVGA3dCmdUpdateGBSurface));

+			gbupdate->sid = ST_SURFACE_ID;

+

+			stupdate = SVGA_cmd3d_ptr(cmdbuf, &cmd_offset, SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, sizeof(SVGA3dCmdUpdateGBScreenTarget));

+			stupdate->stid = 0;

+	  	stupdate->rect.x = 0;

+	  	stupdate->rect.y = 0;

+	  	stupdate->rect.w = hda->width;

+	  	stupdate->rect.h = hda->height;

+

+			SVGA_CMB_submit(cmdbuf, cmd_offset, NULL, SVGA_CB_PRESENT_ASYNC, 0);

+		}

+	  else if(hda->bpp == 32)

 	  {

 	  	SVGAFifoCmdUpdate  *cmd_update;

 	  	DWORD cmd_offset = 0;

-	  	

+

 	  	wait_for_cmdbuf();

-	  	

+

 	  	cmd_update = SVGA_cmd_ptr(cmdbuf, &cmd_offset, SVGA_CMD_UPDATE, sizeof(SVGAFifoCmdUpdate));

 	  	cmd_update->x = 0;

 	  	cmd_update->y = 0;

 	  	cmd_update->width  = hda->width;

 	  	cmd_update->height = hda->height;

 	  	

-			SVGA_CMB_submit(cmdbuf, cmd_offset, NULL, SVGA_CB_SYNC, 0);

+			SVGA_CMB_submit(cmdbuf, cmd_offset, NULL, SVGA_CB_PRESENT_ASYNC, 0);

 	  }

-	}

+	} // fb_lock_cnt == 0

 	

-	//Signal_Semaphore(hda_sem);

+	Signal_Semaphore(hda_sem);

 }

 

 void  FBHDA_palette_set(unsigned char index, DWORD rgb)

diff --git a/vxd_svga.h b/vxd_svga.h
new file mode 100644
index 0000000..6f5b93f
--- /dev/null
+++ b/vxd_svga.h
@@ -0,0 +1,24 @@
+#ifndef __VXD_SVGA_H__INCLUDED__

+#define __VXD_SVGA_H__INCLUDED__

+

+extern void *cmdbuf;

+void wait_for_cmdbuf();

+void *SVGA_cmd_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize);

+void *SVGA_cmd3d_ptr(DWORD *buf, DWORD *pOffset, DWORD cmd, DWORD cmdsize);

+DWORD SVGA_pitch(DWORD width, DWORD bpp);

+

+extern BOOL st_used;

+BOOL st_memory_allocate(DWORD size, DWORD *out);

+void st_defineScreen(DWORD w, DWORD h, DWORD bpp);

+void st_destroyScreen();

+void SVGA_OTable_load();

+SVGA_DB_surface_t *SVGA_GetSurfaceInfo(uint32 sid);

+

+#define ST_REGION_ID 1

+#define ST_SURFACE_ID 1

+

+#define st_useable(_bpp) (st_used && (_bpp) == 32)

+

+DWORD map_pm16(DWORD vm, DWORD linear, DWORD size);

+

+#endif /* __VXD_SVGA_H__INCLUDED__ */

diff --git a/vxd_svga_debug.h b/vxd_svga_debug.h
new file mode 100644
index 0000000..a67a3eb
--- /dev/null
+++ b/vxd_svga_debug.h
@@ -0,0 +1,395 @@
+

+static char svga_cmd_tables[][64] = {

+	"SVGA_3D_CMD_SURFACE_DEFINE",

+	"SVGA_3D_CMD_SURFACE_DESTROY",

+	"SVGA_3D_CMD_SURFACE_COPY",

+	"SVGA_3D_CMD_SURFACE_STRETCHBLT",

+	"SVGA_3D_CMD_SURFACE_DMA",

+	"SVGA_3D_CMD_CONTEXT_DEFINE",

+	"SVGA_3D_CMD_CONTEXT_DESTROY",

+	"SVGA_3D_CMD_SETTRANSFORM",

+	"SVGA_3D_CMD_SETZRANGE",

+	"SVGA_3D_CMD_SETRENDERSTATE",

+	"SVGA_3D_CMD_SETRENDERTARGET",

+	"SVGA_3D_CMD_SETTEXTURESTATE",

+	"SVGA_3D_CMD_SETMATERIAL",

+	"SVGA_3D_CMD_SETLIGHTDATA",

+	"SVGA_3D_CMD_SETLIGHTENABLED",

+	"SVGA_3D_CMD_SETVIEWPORT",

+	"SVGA_3D_CMD_SETCLIPPLANE",

+	"SVGA_3D_CMD_CLEAR",

+	"SVGA_3D_CMD_PRESENT",

+	"SVGA_3D_CMD_SHADER_DEFINE",

+	"SVGA_3D_CMD_SHADER_DESTROY",

+	"SVGA_3D_CMD_SET_SHADER",

+	"SVGA_3D_CMD_SET_SHADER_CONST",

+	"SVGA_3D_CMD_DRAW_PRIMITIVES",

+	"SVGA_3D_CMD_SETSCISSORRECT",

+	"SVGA_3D_CMD_BEGIN_QUERY",

+	"SVGA_3D_CMD_END_QUERY",

+	"SVGA_3D_CMD_WAIT_FOR_QUERY",

+	"SVGA_3D_CMD_PRESENT_READBACK",

+	"SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN",

+	"SVGA_3D_CMD_SURFACE_DEFINE_V2",

+	"SVGA_3D_CMD_GENERATE_MIPMAPS",

+	"SVGA_UNK_1072",

+	"SVGA_UNK_1073",

+	"SVGA_UNK_1074",

+	"SVGA_UNK_1075",

+	"SVGA_UNK_1076",

+	"SVGA_UNK_1077",

+	"SVGA_UNK_1078",

+	"SVGA_UNK_1079",

+	"SVGA_3D_CMD_ACTIVATE_SURFACE",

+	"SVGA_3D_CMD_DEACTIVATE_SURFACE",

+	"SVGA_3D_CMD_SCREEN_DMA",

+	"SVGA_3D_CMD_DEAD1",

+	"SVGA_3D_CMD_DEAD2",

+	"SVGA_3D_CMD_DEAD12",

+	"SVGA_3D_CMD_DEAD13",

+	"SVGA_3D_CMD_DEAD14",

+	"SVGA_3D_CMD_DEAD15",

+	"SVGA_3D_CMD_DEAD16",

+	"SVGA_3D_CMD_DEAD17",

+	"SVGA_3D_CMD_SET_OTABLE_BASE",

+	"SVGA_3D_CMD_READBACK_OTABLE",

+	"SVGA_3D_CMD_DEFINE_GB_MOB",

+	"SVGA_3D_CMD_DESTROY_GB_MOB",

+	"SVGA_3D_CMD_DEAD3",

+	"SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING",

+	"SVGA_3D_CMD_DEFINE_GB_SURFACE",

+	"SVGA_3D_CMD_DESTROY_GB_SURFACE",

+	"SVGA_3D_CMD_BIND_GB_SURFACE",

+	"SVGA_3D_CMD_COND_BIND_GB_SURFACE",

+	"SVGA_3D_CMD_UPDATE_GB_IMAGE",

+	"SVGA_3D_CMD_UPDATE_GB_SURFACE",

+	"SVGA_3D_CMD_READBACK_GB_IMAGE",

+	"SVGA_3D_CMD_READBACK_GB_SURFACE",

+	"SVGA_3D_CMD_INVALIDATE_GB_IMAGE",

+	"SVGA_3D_CMD_INVALIDATE_GB_SURFACE",

+	"SVGA_3D_CMD_DEFINE_GB_CONTEXT",

+	"SVGA_3D_CMD_DESTROY_GB_CONTEXT",

+	"SVGA_3D_CMD_BIND_GB_CONTEXT",

+	"SVGA_3D_CMD_READBACK_GB_CONTEXT",

+	"SVGA_3D_CMD_INVALIDATE_GB_CONTEXT",

+	"SVGA_3D_CMD_DEFINE_GB_SHADER",

+	"SVGA_3D_CMD_DESTROY_GB_SHADER",

+	"SVGA_3D_CMD_BIND_GB_SHADER",

+	"SVGA_3D_CMD_SET_OTABLE_BASE64",

+	"SVGA_3D_CMD_BEGIN_GB_QUERY",

+	"SVGA_3D_CMD_END_GB_QUERY",

+	"SVGA_3D_CMD_WAIT_FOR_GB_QUERY",

+	"SVGA_3D_CMD_NOP",

+	"SVGA_3D_CMD_ENABLE_GART",

+	"SVGA_3D_CMD_DISABLE_GART",

+	"SVGA_3D_CMD_MAP_MOB_INTO_GART",

+	"SVGA_3D_CMD_UNMAP_GART_RANGE",

+	"SVGA_3D_CMD_DEFINE_GB_SCREENTARGET",

+	"SVGA_3D_CMD_DESTROY_GB_SCREENTARGET",

+	"SVGA_3D_CMD_BIND_GB_SCREENTARGET",

+	"SVGA_3D_CMD_UPDATE_GB_SCREENTARGET",

+	"SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL",

+	"SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL",

+	"SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE",

+	"SVGA_3D_CMD_GB_SCREEN_DMA",

+	"SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH",

+	"SVGA_3D_CMD_GB_MOB_FENCE",

+	"SVGA_3D_CMD_DEFINE_GB_SURFACE_V2",

+	"SVGA_3D_CMD_DEFINE_GB_MOB64",

+	"SVGA_3D_CMD_REDEFINE_GB_MOB64",

+	"SVGA_3D_CMD_NOP_ERROR",

+	"SVGA_3D_CMD_SET_VERTEX_STREAMS",

+	"SVGA_3D_CMD_SET_VERTEX_DECLS",

+	"SVGA_3D_CMD_SET_VERTEX_DIVISORS",

+	"SVGA_3D_CMD_DRAW",

+	"SVGA_3D_CMD_DRAW_INDEXED",

+	"SVGA_3D_CMD_DX_DEFINE_CONTEXT",

+	"SVGA_3D_CMD_DX_DESTROY_CONTEXT",

+	"SVGA_3D_CMD_DX_BIND_CONTEXT",

+	"SVGA_3D_CMD_DX_READBACK_CONTEXT",

+	"SVGA_3D_CMD_DX_INVALIDATE_CONTEXT",

+	"SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER",

+	"SVGA_3D_CMD_DX_SET_SHADER_RESOURCES",

+	"SVGA_3D_CMD_DX_SET_SHADER",

+	"SVGA_3D_CMD_DX_SET_SAMPLERS",

+	"SVGA_3D_CMD_DX_DRAW",

+	"SVGA_3D_CMD_DX_DRAW_INDEXED",

+	"SVGA_3D_CMD_DX_DRAW_INSTANCED",

+	"SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED",

+	"SVGA_3D_CMD_DX_DRAW_AUTO",

+	"SVGA_3D_CMD_DX_SET_INPUT_LAYOUT",

+	"SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS",

+	"SVGA_3D_CMD_DX_SET_INDEX_BUFFER",

+	"SVGA_3D_CMD_DX_SET_TOPOLOGY",

+	"SVGA_3D_CMD_DX_SET_RENDERTARGETS",

+	"SVGA_3D_CMD_DX_SET_BLEND_STATE",

+	"SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE",

+	"SVGA_3D_CMD_DX_SET_RASTERIZER_STATE",

+	"SVGA_3D_CMD_DX_DEFINE_QUERY",

+	"SVGA_3D_CMD_DX_DESTROY_QUERY",

+	"SVGA_3D_CMD_DX_BIND_QUERY",

+	"SVGA_3D_CMD_DX_SET_QUERY_OFFSET",

+	"SVGA_3D_CMD_DX_BEGIN_QUERY",

+	"SVGA_3D_CMD_DX_END_QUERY",

+	"SVGA_3D_CMD_DX_READBACK_QUERY",

+	"SVGA_3D_CMD_DX_SET_PREDICATION",

+	"SVGA_3D_CMD_DX_SET_SOTARGETS",

+	"SVGA_3D_CMD_DX_SET_VIEWPORTS",

+	"SVGA_3D_CMD_DX_SET_SCISSORRECTS",

+	"SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW",

+	"SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW",

+	"SVGA_3D_CMD_DX_PRED_COPY_REGION",

+	"SVGA_3D_CMD_DX_PRED_COPY",

+	"SVGA_3D_CMD_DX_PRESENTBLT",

+	"SVGA_3D_CMD_DX_GENMIPS",

+	"SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE",

+	"SVGA_3D_CMD_DX_READBACK_SUBRESOURCE",

+	"SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE",

+	"SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW",

+	"SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW",

+	"SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW",

+	"SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW",

+	"SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW",

+	"SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW",

+	"SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT",

+	"SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT",

+	"SVGA_3D_CMD_DX_DEFINE_BLEND_STATE",

+	"SVGA_3D_CMD_DX_DESTROY_BLEND_STATE",

+	"SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE",

+	"SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE",

+	"SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE",

+	"SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE",

+	"SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE",

+	"SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE",

+	"SVGA_3D_CMD_DX_DEFINE_SHADER",

+	"SVGA_3D_CMD_DX_DESTROY_SHADER",

+	"SVGA_3D_CMD_DX_BIND_SHADER",

+	"SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT",

+	"SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT",

+	"SVGA_3D_CMD_DX_SET_STREAMOUTPUT",

+	"SVGA_3D_CMD_DX_SET_COTABLE",

+	"SVGA_3D_CMD_DX_READBACK_COTABLE",

+	"SVGA_3D_CMD_DX_BUFFER_COPY",

+	"SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER",

+	"SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK",

+	"SVGA_3D_CMD_DX_MOVE_QUERY",

+	"SVGA_3D_CMD_DX_BIND_ALL_QUERY",

+	"SVGA_3D_CMD_DX_READBACK_ALL_QUERY",

+	"SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER",

+	"SVGA_3D_CMD_DX_MOB_FENCE_64",

+	"SVGA_3D_CMD_DX_BIND_ALL_SHADER",

+	"SVGA_3D_CMD_DX_HINT",

+	"SVGA_3D_CMD_DX_BUFFER_UPDATE",

+	"SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET",

+	"SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER",

+	"SVGA_3D_CMD_SCREEN_COPY",

+	"SVGA_3D_CMD_RESERVED1",

+	"SVGA_3D_CMD_RESERVED2",

+	"SVGA_3D_CMD_RESERVED3",

+	"SVGA_3D_CMD_RESERVED4",

+	"SVGA_3D_CMD_RESERVED5",

+	"SVGA_3D_CMD_RESERVED6",

+	"SVGA_3D_CMD_RESERVED7",

+	"SVGA_3D_CMD_RESERVED8",

+	"SVGA_3D_CMD_GROW_OTABLE",

+	"SVGA_3D_CMD_DX_GROW_COTABLE",

+	"SVGA_3D_CMD_INTRA_SURFACE_COPY",

+	"SVGA_3D_CMD_DEFINE_GB_SURFACE_V3",

+	"SVGA_3D_CMD_DX_RESOLVE_COPY",

+	"SVGA_3D_CMD_DX_PRED_RESOLVE_COPY",

+	"SVGA_3D_CMD_DX_PRED_CONVERT_REGION",

+	"SVGA_3D_CMD_DX_PRED_CONVERT",

+	"SVGA_3D_CMD_WHOLE_SURFACE_COPY",

+	"SVGA_3D_CMD_DX_DEFINE_UA_VIEW",

+	"SVGA_3D_CMD_DX_DESTROY_UA_VIEW",

+	"SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT",

+	"SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT",

+	"SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT",

+	"SVGA_3D_CMD_DX_SET_UA_VIEWS",

+	"SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT",

+	"SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT",

+	"SVGA_3D_CMD_DX_DISPATCH",

+	"SVGA_3D_CMD_DX_DISPATCH_INDIRECT",

+	"SVGA_3D_CMD_WRITE_ZERO_SURFACE",

+	"SVGA_3D_CMD_UPDATE_ZERO_SURFACE",

+	"SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER",

+	"SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT",

+	"SVGA_3D_CMD_LOGICOPS_BITBLT",

+	"SVGA_3D_CMD_LOGICOPS_TRANSBLT",

+	"SVGA_3D_CMD_LOGICOPS_STRETCHBLT",

+	"SVGA_3D_CMD_LOGICOPS_COLORFILL",

+	"SVGA_3D_CMD_LOGICOPS_ALPHABLEND",

+	"SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND",

+	"SVGA_3D_CMD_DX_COPY_COTABLE_INTO_MOB",

+	"SVGA_3D_CMD_UPDATE_GB_SCREENTARGET_V2",

+	"SVGA_3D_CMD_DEFINE_GB_SURFACE_V4",

+	"SVGA_3D_CMD_DX_SET_CS_UA_VIEWS",

+	"SVGA_3D_CMD_DX_SET_MIN_LOD",

+	"SVGA_UNK_2070",

+	"SVGA_UNK_2071",

+	"SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2",

+	"SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB",

+	"SVGA_3D_CMD_DX_SET_SHADER_IFACE",

+	"SVGA_3D_CMD_DX_BIND_STREAMOUTPUT",

+	"SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS",

+	"SVGA_3D_CMD_DX_BIND_SHADER_IFACE",

+	"SVGA_3D_CMD_UPDATE_GB_SCREENTARGET_MOVE",

+	"SVGA_UNK_2079",

+	"SVGA_UNK_2080",

+	"SVGA_3D_CMD_DX_PRED_STAGING_COPY",

+	"SVGA_3D_CMD_DX_STAGING_COPY",

+	"SVGA_3D_CMD_DX_PRED_STAGING_COPY_REGION",

+	"SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS_V2",

+	"SVGA_3D_CMD_DX_SET_INDEX_BUFFER_V2",

+	"SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS_OFFSET_AND_SIZE",

+	"SVGA_3D_CMD_DX_SET_INDEX_BUFFER_OFFSET_AND_SIZE",

+	"SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2",

+	"SVGA_3D_CMD_DX_PRED_STAGING_CONVERT_REGION",

+	"SVGA_3D_CMD_DX_PRED_STAGING_CONVERT",

+	"SVGA_3D_CMD_DX_STAGING_BUFFER_COPY",

+};

+

+#define CMD3D_MIN 1040

+#define CMD3D_MAX 1291

+

+static char dbg_cmd3d[] = "cmd3D: %s (%d)\n";

+static char dbg_cmd3d_trace[] = "cmd3D(%02ld): %s (%ld)\n";

+//static char dbg_cmd_fence[] = "cmd FENCE\n";

+//static char dbg_cmd_unk[] = "non 3D cmd %d - STOP\n";

+

+void debug_cmdbuf(void *cmdbuf, DWORD cmd_size)

+{

+	BYTE *ptr = cmdbuf;

+	BYTE *ptr_max = ptr + cmd_size;

+	

+	while(ptr < ptr_max)

+	{

+		DWORD *cmd = (DWORD*)ptr;

+		

+		if(*cmd >= CMD3D_MIN && *cmd <= CMD3D_MAX)

+		{

+			dbg_printf(dbg_cmd3d, svga_cmd_tables[*cmd - CMD3D_MIN], *cmd);

+			ptr += *(cmd+1) + 8;

+		}

+		/*else if(*cmd == SVGA_CMD_FENCE)

+		{

+			dbg_printf(dbg_cmd_fence);

+			ptr += 8;

+		}*/

+		else

+		{

+			//dbg_printf(dbg_cmd_unk, *cmd);

+			return;

+		}

+	}

+}

+

+#define LAST_CMDS_MAX 16

+static DWORD last_cmds[LAST_CMDS_MAX] = {0};

+static DWORD last_cmds_pos = 0;

+

+void debug_cmdbuf_trace(void *cmdbuf, DWORD cmd_size, DWORD cmd_to_trace)

+{

+	BYTE *ptr = cmdbuf;

+	BYTE *ptr_max = ptr + cmd_size;

+	

+	while(ptr < ptr_max)

+	{

+		DWORD *cmd = (DWORD*)ptr;

+		

+		if(*cmd >= CMD3D_MIN && *cmd <= CMD3D_MAX)

+		{

+			DWORD size = *(cmd+1);

+			//dbg_printf(dbg_cmd3d, svga_cmd_tables[*cmd - CMD3D_MIN], *cmd);

+			last_cmds[last_cmds_pos++] = *cmd;

+			last_cmds_pos %= LAST_CMDS_MAX;

+			

+			if(*cmd == cmd_to_trace)

+			{

+				DWORD i;

+				for(i = 0; i < LAST_CMDS_MAX; i++)

+				{

+					DWORD c = last_cmds[(last_cmds_pos + i) % LAST_CMDS_MAX];

+					dbg_printf(dbg_cmd3d_trace, i, svga_cmd_tables[c - CMD3D_MIN], c);

+				}

+			}

+			

+			ptr += size + 8;

+		}

+		/*else if(*cmd == SVGA_CMD_FENCE)

+		{

+			dbg_printf(dbg_cmd_fence);

+			ptr += 8;

+		}*/

+		else

+		{

+			//dbg_printf(dbg_cmd_unk, *cmd);

+			return;

+		}

+	}

+}

+

+static char debug_draw_surface[] = "\tSID: %ld\n";

+

+void debug_draw(void *cmdbuf, DWORD cmd_size)

+{

+	BYTE *ptr = cmdbuf;

+	BYTE *ptr_max = ptr + cmd_size;

+	

+	while(ptr < ptr_max)

+	{

+		DWORD *cmd = (DWORD*)ptr;

+		

+		switch(*cmd)

+		{

+			case SVGA_3D_CMD_DX_DRAW:

+			case SVGA_3D_CMD_DX_DRAW_INDEXED:

+			case SVGA_3D_CMD_DX_BEGIN_QUERY:

+			case SVGA_3D_CMD_DX_END_QUERY:

+			case SVGA_3D_CMD_READBACK_GB_SURFACE:

+			case SVGA_3D_CMD_SURFACE_DMA:

+			case SVGA_3D_CMD_UPDATE_GB_SURFACE:

+			case SVGA_3D_CMD_UPDATE_GB_SCREENTARGET:

+				dbg_printf(dbg_cmd3d, svga_cmd_tables[*cmd - CMD3D_MIN], *cmd);

+				break;

+			case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN:

+				dbg_printf(dbg_cmd3d, svga_cmd_tables[*cmd - CMD3D_MIN], *cmd);

+				dbg_printf(debug_draw_surface, *(cmd+2));

+				break;

+			case SVGA_3D_CMD_DX_SET_SOTARGETS:

+				{

+					DWORD i;

+					DWORD size = (*(cmd+1))/4 + 2;

+					dbg_printf(dbg_cmd3d, svga_cmd_tables[*cmd - CMD3D_MIN], *cmd);

+					// 0: cmd

+					// 1: size

+					// 2: pad

+					for(i = 3; i < size; i += (sizeof(SVGA3dSoTarget)/4) )

+					{

+						dbg_printf(debug_draw_surface, *(cmd+i));

+					}

+				}

+				break;

+		}

+		

+		if(*cmd >= CMD3D_MIN && *cmd <= CMD3D_MAX)

+		{

+			ptr += *(cmd+1) + 8;

+		}

+		else if(*cmd == SVGA_CMD_FENCE)

+		{

+			//dbg_printf(dbg_cmd_fence);

+			ptr += 8;

+		}

+		else

+		{

+			//dbg_printf(dbg_cmd_unk, *cmd);

+			return;

+		}

+	}

+}

diff --git a/vxd_svga_st.c b/vxd_svga_st.c
new file mode 100644
index 0000000..23bd7f4
--- /dev/null
+++ b/vxd_svga_st.c
@@ -0,0 +1,189 @@
+/*****************************************************************************

+

+Copyright (c) 2024 Jaroslav Hensl <emulator@emulace.cz>

+

+Permission is hereby granted, free of charge, to any person obtaining a copy

+of this software and associated documentation files (the "Software"), to deal

+in the Software without restriction, including without limitation the rights

+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

+copies of the Software, and to permit persons to whom the Software is

+furnished to do so, subject to the following conditions:

+

+The above copyright notice and this permission notice shall be included in

+all copies or substantial portions of the Software.

+

+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

+THE SOFTWARE.

+

+*****************************************************************************/

+

+/* 32 bit RING-0 code for SVGA-II 3D acceleration */

+#define SVGA

+

+#include <limits.h>

+

+#include "winhack.h"

+#include "vmm.h"

+#include "vxd.h"

+#include "vxd_lib.h"

+

+#include "svga_all.h"

+

+#include "3d_accel.h"

+

+#include "code32.h"

+

+#include "vxd_svga.h"

+

+#include "vxd_strings.h"

+

+/* values from newer headers */

+#define SVGA3D_SURFACE_SCREENTARGET (1 << 16)

+#define SVGA3D_SURFACE_BIND_RENDER_TARGET     (1 << 24)

+

+BOOL st_used = FALSE;

+static BOOL st_defined = FALSE;

+

+static SVGA_region_info_t st_region;

+

+BOOL st_memory_allocate(DWORD size, DWORD *out)

+{

+	memset(&st_region, 0, sizeof(SVGA_region_info_t));

+	

+	st_region.region_id = ST_REGION_ID;

+	st_region.size = size;

+	st_region.mobonly = FALSE;

+	

+	if(SVGA_region_create(&st_region))

+	{

+		*out = (DWORD)st_region.address;

+		return TRUE;

+	}

+	

+	return FALSE;

+}

+

+void st_defineScreen(DWORD w, DWORD h, DWORD bpp)

+{

+  SVGAFifoCmdDefineScreen *screen;

+  SVGAFifoCmdDefineGMRFB  *fbgmr;

+  SVGA3dCmdDefineGBScreenTarget *stid;

+  SVGA3dCmdDefineGBSurface_v2 *gbsurf;

+  SVGA3dCmdBindGBSurface   *gbbind;

+  SVGA3dCmdBindGBScreenTarget *stbind;

+  SVGA_DB_surface_t *sinfo;

+  DWORD cmdoff = 0;

+  

+  wait_for_cmdbuf();

+  

+  screen = SVGA_cmd_ptr(cmdbuf, &cmdoff, SVGA_CMD_DEFINE_SCREEN, sizeof(SVGAFifoCmdDefineScreen));

+

+	/* define screen (32 bit) */

+	memset(screen, 0, sizeof(SVGAFifoCmdDefineScreen));

+	screen->screen.structSize = sizeof(SVGAScreenObject);

+	screen->screen.id = 0;

+	screen->screen.flags = SVGA_SCREEN_MUST_BE_SET | SVGA_SCREEN_IS_PRIMARY;

+	screen->screen.size.width = w;

+	screen->screen.size.height = h;

+	screen->screen.root.x = 0;

+	screen->screen.root.y = 0;

+	screen->screen.cloneCount = 0;

+	screen->screen.backingStore.ptr.offset = 0;

+	screen->screen.backingStore.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;

+	

+	/* set backing store to framebuffer (for cases where surface_bpp != 32) */

+  fbgmr = SVGA_cmd_ptr(cmdbuf, &cmdoff, SVGA_CMD_DEFINE_GMRFB, sizeof(SVGAFifoCmdDefineGMRFB));

+	fbgmr->ptr.gmrId = SVGA_GMR_FRAMEBUFFER;

+	fbgmr->ptr.offset = 0;

+	fbgmr->bytesPerLine = SVGA_pitch(w, bpp);

+	fbgmr->format.colorDepth = bpp;

+	fbgmr->format.bitsPerPixel = 32;

+	fbgmr->format.colorDepth   = 24;

+	fbgmr->format.reserved     = 0;

+	

+	/* create screen target */

+	stid = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, sizeof(SVGA3dCmdDefineGBScreenTarget));

+	stid->stid = 0;

+	stid->flags = SVGA_STFLAG_PRIMARY;

+	stid->width = w;

+	stid->height = h;

+	stid->xRoot = 0;

+	stid->yRoot = 0;

+	

+	SVGA_CMB_submit(cmdbuf, cmdoff, NULL, SVGA_CB_SYNC, 0);

+	

+	wait_for_cmdbuf();

+	cmdoff = 0;

+	

+	/* create gb texture */

+	gbsurf = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, sizeof(SVGA3dCmdDefineGBSurface_v2));

+	gbsurf->sid                = ST_SURFACE_ID;

+	gbsurf->surfaceFlags       = SVGA3D_SURFACE_SCREENTARGET | SVGA3D_SURFACE_HINT_RENDERTARGET | SVGA3D_SURFACE_BIND_RENDER_TARGET;

+	switch(bpp)

+	{

+		case 16: gbsurf->format = SVGA3D_R5G6B5; break;

+		default: gbsurf->format = SVGA3D_X8R8G8B8; /*SVGA3D_R8G8B8A8_UNORM;*/ break;

+	}

+	gbsurf->numMipLevels       = 1;

+	gbsurf->multisampleCount   = 1;

+	gbsurf->autogenFilter      = SVGA3D_TEX_FILTER_NONE;

+	gbsurf->size.width         = w;

+  gbsurf->size.height        = h;

+  gbsurf->size.depth         = 1;

+  gbsurf->arraySize          = 1;

+  gbsurf->pad                = 0;

+

+	/* bind texture to our GMR/mob */

+	gbbind        = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_BIND_GB_SURFACE, sizeof(SVGA3dCmdBindGBSurface));

+	gbbind->sid   = ST_SURFACE_ID;

+	gbbind->mobid = st_region.region_id;

+	

+	/* bind screen target to the texture */

+	stbind               = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_BIND_GB_SCREENTARGET, sizeof(SVGA3dCmdBindGBScreenTarget));

+	stbind->stid         = 0;

+	stbind->image.sid    = ST_SURFACE_ID;

+	stbind->image.face   = 0;

+	stbind->image.mipmap = 0;

+	

+	sinfo = SVGA_GetSurfaceInfo(ST_SURFACE_ID);

+	memset(sinfo, 0, sizeof(SVGA_DB_surface_t));

+	sinfo->pid    = ~0UL;

+	sinfo->width  = w;

+	sinfo->height = h;

+	sinfo->format = gbsurf->format;

+	sinfo->bpp    = bpp;

+	sinfo->gmrId  = ST_REGION_ID;

+	sinfo->flags  = 0;

+	

+	SVGA_CMB_submit(cmdbuf, cmdoff, NULL, SVGA_CB_SYNC, 0);

+

+	st_defined = TRUE;

+}

+

+void st_destroyScreen()

+{

+	SVGA3dCmdDestroyGBScreenTarget *stid;

+	SVGA3dCmdDestroyGBSurface      *gbsurf;

+	DWORD cmdoff = 0;

+	

+	if(st_defined)

+	{

+		wait_for_cmdbuf();

+		

+		stid = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, sizeof(SVGA3dCmdDestroyGBScreenTarget));

+ 		stid->stid = 0;

+ 	

+ 		gbsurf = SVGA_cmd3d_ptr(cmdbuf, &cmdoff, SVGA_3D_CMD_DESTROY_GB_SURFACE, sizeof(SVGA3dCmdDestroyGBSurface));

+ 		gbsurf->sid = ST_SURFACE_ID;

+ 		

+ 		SVGA_CMB_submit(cmdbuf, cmdoff, NULL, SVGA_CB_SYNC, 0);

+ 		

+ 		st_defined = FALSE;

+ 	}

+}

+

diff --git a/vxd_vbe.c b/vxd_vbe.c
index c6bba58..b641b5d 100644
--- a/vxd_vbe.c
+++ b/vxd_vbe.c
@@ -309,6 +309,15 @@ BOOL FBHDA_swap(DWORD offset)
 	return TRUE;

 }

 

+void FBHDA_access_begin(DWORD flags)

+{

+	//Wait_Semaphore(hda_sem, 0);

+	if(fb_lock_cnt++ == 0)

+	{

+		mouse_erase();

+	}

+}

+

 void FBHDA_access_end(DWORD flags)

 {

 	fb_lock_cnt--;

diff --git a/vxd_vdd.c b/vxd_vdd.c
index 032ed2f..dc628b3 100644
--- a/vxd_vdd.c
+++ b/vxd_vdd.c
@@ -71,7 +71,7 @@ static void VDD_Register_Extra_Screen_Selector(DWORD selector)
 	_asm pop eax

 }

 

-static DWORD map_pm16(DWORD vm, DWORD linear, DWORD size)

+DWORD map_pm16(DWORD vm, DWORD linear, DWORD size)

 {

 	DWORD hi  = 0;

 	DWORD low = 0;