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* avutil/cpu: Disable ff_getauxval() on x86Andreas Rheinhardt2025-02-021-0/+2
| | | | | | Not used there. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* configure: Add wasm as a fake archZhao Zhili2024-12-041-0/+6
| | | | | | | | | And add wasm simd128 flag, so we can add simd128 optimizations. It can be enabled by put -msimd128 to extra cflags. There is no runtime detection on simd128 support yet. I think that needs to be done with JavaScript. Signed-off-by: Zhao Zhili <zhilizhao@tencent.com>
* ppc: Recognize the PPC VSX and Power8 CPU flagsBrad Smith2024-09-281-0/+2
| | | | Signed-off-by: Brad Smith <brad@comstyle.com>
* aarch64: Add CPU feature flags for SVE and SVE2Martin Storsjö2024-09-271-0/+2
| | | | | | Add code for detecting the feature on Linux and Windows. Signed-off-by: Martin Storsjö <martin@martin.st>
* aarch64: Implement support for elf_aux_info(3) on FreeBSD and OpenBSDBrad Smith2024-09-091-1/+8
| | | | | | | FreeBSD 12.0+, OpenBSD -current and what will be OpenBSD 7.6 support elf_aux_info(3). Signed-off-by: Brad Smith <brad@comstyle.com>
* avutil/cpu_internal: Provide ff_getauxval() wrapper for getauxvaul()Brad Smith2024-09-091-0/+14
| | | | | | | Initially used for getauxval() but will be used to add support for other API, such as elf_aux_info(). Signed-off-by: Brad Smith <brad@comstyle.com>
* lavu/riscv: drop probing for zba CPU capabilityRémi Denis-Courmont2024-08-051-1/+0
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* lavc/riscv: drop probing for F & D extensionsRémi Denis-Courmont2024-08-011-2/+0
| | | | | | | | | | F and D extensions are included in all RISC-V application profiles ever made (so starting from RV64GC a.k.a. RVA20). Realistically they need to be selected at compilation time. Currently, there are no consumers for these two flags. If there is ever a need to reintroduce F- or D-specific optimisations, we can always use __riscv_f or __riscv_d compiler predefined macros respectively.
* lavu/riscv: add CPU flag for B bit manipulationsRémi Denis-Courmont2024-07-251-0/+1
| | | | | | | | The B extension was finally ratified in May 2024, encompassing: - Zba (addresses), - Zbb (basics) and - Zbs (single bits). It does not include Zbc (base-2 polynomials).
* lavu/riscv: CPU flag for fast misaligned accessesRémi Denis-Courmont2024-05-141-0/+1
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* riscv: add Zvbb vector bit manipulation extensionRémi Denis-Courmont2024-05-111-0/+1
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* all: Don't use ATOMIC_VAR_INITAndreas Rheinhardt2024-03-281-3/+3
| | | | | | | | | | | | | | | | | | | | C11 required to use ATOMIC_VAR_INIT to statically initialize atomic objects with static storage duration. Yet this macro was unsuitable for initializing structures [1] and was actually unneeded for all known implementations (this includes our compatibility fallback implementations which simply wrap the value in parentheses: #define ATOMIC_VAR_INIT(value) (value)). Therefore C17 deprecated the macro and C23 actually removed it [2]. Since commit 5ff0eb34d2b1089d3dd9f27fdb51520001709138 we default to C17 if the compiler supports it; Clang warns about ATOMIC_VAR_INIT in this mode. Given that no implementation ever needed this macro, this commit stops using it to avoid this warning. [1]: https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2396.htm#dr_485 [2]: https://en.cppreference.com/w/c/atomic/ATOMIC_VAR_INIT Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* Revert "all: Don't set AVClass.item_name to its default value"Anton Khirnov2024-01-201-0/+1
| | | | | | | Some callers assume that item_name is always set, so this may be considered an API break. This reverts commit 0c6203c97a99f69dbaa6e4011d48c331e1111f5e.
* all: Don't set AVClass.item_name to its default valueAndreas Rheinhardt2023-12-221-1/+0
| | | | | | | | Unnecessary since acf63d5350adeae551d412db699f8ca03f7e76b9; also avoids relocations. Reviewed-by: Anton Khirnov <anton@khirnov.net> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* riscv: Tweak names of cpu flags, print flags in libavutil/tests/cpuMartin Storsjö2023-12-171-6/+6
| | | | | | | | | | | | | | | | The names of the cpu flags, when parsed from a string with av_parse_cpu_caps, are parsed by the libavutil eval functions. These interpret dashes as subtractions. Therefore, these previous cpu flag names haven't been possible to set. Use the official names for these extensions, as the previous ad-hoc names wasn't parseable. libavutil/tests/cpu tests that the cpu flags can be set, and prints the detected flags. Acked-by: Rémi Denis-Courmont <remi@remlab.net> Signed-off-by: Martin Storsjö <martin@martin.st>
* lavu: add/use flag for RISC-V Zba extensionRémi Denis-Courmont2023-07-191-0/+1
| | | | | | The code was blindly assuming that Zbb or V implied Zba. While the earlier is practically always true, the later broke some QEMU setups, as V was introduced earlier than Zba.
* aarch64: Add cpu flags for the dotprod and i8mm extensionsMartin Storsjö2023-06-061-0/+2
| | | | | | | Set these available if they are available unconditionally for the compiler. Signed-off-by: Martin Storsjö <martin@martin.st>
* lavu/riscv: CPU flag for the Zbb extensionRémi Denis-Courmont2022-10-051-0/+1
| | | | | | | | | | | | Unfortunately, it is common, and will remain so, that the Bit manipulations are not enabled at compilation time. This is an official policy for Debian ports in general (though they do not support RISC-V officially as of yet) to stick to the minimal target baseline, which does not include the B extension or even its Zbb subset. For inline helpers (CPOP, REV8), compiler builtins (CTZ, CLZ) or even plain C code (MIN, MAX, MINU, MAXU), run-time detection seems impractical. But at least it can work for the byte-swap DSP functions.
* lavu/cpu: CPU flags for the RISC-V Vector extensionRémi Denis-Courmont2022-09-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RVV defines a total of 12 different extensions, including: - 5 different instruction subsets: - Zve32x: 8-, 16- and 32-bit integers, - Zve32f: Zve32x plus single precision floats, - Zve64x: Zve32x plus 64-bit integers, - Zve64f: Zve32f plus Zve64x, - Zve64d: Zve64f plus double precision floats. - 6 different vector lengths: - Zvl32b (embedded only), - Zvl64b (embedded only), - Zvl128b, - Zvl256b, - Zvl512b, - Zvl1024b, - and the V extension proper: equivalent to Zve64f and Zvl128b. In total, there are 6 different possible sets of supported instructions (including the empty set), but for convenience we allocate one bit for each type sets: up-to-32-bit ints (RVV_I32), floats (RVV_F32), 64-bit ints (RVV_I64) and doubles (RVV_F64). Whence the vector size is needed, it can be retrieved by reading the unprivileged read-only vlenb CSR. This should probably be a separate helper macro if needed at a later point.
* lavu/cpu: detect RISC-V base extensionsRémi Denis-Courmont2022-09-271-0/+6
| | | | | | | | | | This introduces compile-time and run-time CPU detection on RISC-V. In practice, I doubt that FFmpeg will ever see a RISC-V CPU without all of I, F and D extensions, and if it does, it probably won't have run-time detection. So the flags are essentially always set. But as things stand, checkasm wants them that way. Compare the ARMV8 flag on AArch64. We are nowhere near running short on CPU flag bits.
* all: Replace if (ARCH_FOO) checks by #if ARCH_FOOAndreas Rheinhardt2022-06-151-24/+26
| | | | | | | | | | | | | | | | | | This is more spec-compliant because it does not rely on dead-code elimination by the compiler. Especially MSVC has problems with this, as can be seen in https://ffmpeg.org/pipermail/ffmpeg-devel/2022-May/296373.html or https://ffmpeg.org/pipermail/ffmpeg-devel/2022-May/297022.html This commit does not eliminate every instance where we rely on dead code elimination: It only tackles branching to the initialization of arch-specific dsp code, not e.g. all uses of CONFIG_ and HAVE_ checks. But maybe it is already enough to compile FFmpeg with MSVC with whole-programm-optimizations enabled (if one does not disable too many components). Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* avutil/cpu: #define _GNU_SOURCE before including any standard headersMarton Balint2022-04-221-7/+9
| | | | | | | | Otherwise its effect might not work causing CPU_COUNT to not get defined. Fixes cpu count detection to actually use sched_getaffinity if available. Signed-off-by: Marton Balint <cus@passwd.hu>
* avutil/cpu: add AVX512 Icelake flagWu Jianhua2022-03-101-0/+1
| | | | | | Signed-off-by: Wu Jianhua <jianhua.wu@intel.com> Reviewed-by: Henrik Gramner <henrik@gramner.com> Signed-off-by: James Almer <jamrial@gmail.com>
* avutil/cpu: add slowgather to av_parse_cpu_caps()James Almer2021-12-211-0/+1
| | | | Signed-off-by: James Almer <jamrial@gmail.com>
* avutil: [loongarch] Add support for loongarch SIMD.Shiyou Yin2021-12-151-0/+7
| | | | | | | | | | | LSX and LASX is loongarch SIMD extention. They are enabled by default if compiler support it, and can be disabled with '--disable-lsx' '--disable-lasx'. Change-Id: Ie2608ea61dbd9b7fffadbf0ec2348bad6c124476 Reviewed-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Reviewed-by: guxiwei <guxiwei-hf@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
* lavu/cpu: Use av_cpu_ prefixThilo Borgmann2021-07-201-1/+2
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* lavu/cpu.c: Add av_force_cpu_count() to override auto-detection.Thilo Borgmann2021-07-161-0/+13
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* avutil/cpu: Remove deprecated functionsAndreas Rheinhardt2021-04-271-92/+0
| | | | | Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com> Signed-off-by: James Almer <jamrial@gmail.com>
* avutil/cpu: Schedule deprecated functions for removalAndreas Rheinhardt2021-04-191-1/+2
| | | | | | | | av_set_cpu_flags_mask() has been deprecated in the commit which merged it: 6df42f98746be06c883ce683563e07c9a2af983f; av_parse_cpu_flags() has been deprecated in 4b529edff8934c258af95e5acc51f84deea66262. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* avutil/cpu: Use HW_NCPUONLINE to detect # of online CPUs with OpenBSDBrad Smith2021-04-181-0/+6
| | | | | Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Marton Balint <cus@passwd.hu>
* avutil/cpu: Fix race condition in av_cpu_count()Andreas Rheinhardt2021-04-021-4/+2
| | | | | | | | | | av_cpu_count() intends to emit a debug message containing the number of logical cores when called the first time. The check currently works with a static volatile int; yet this does not help at all in case of concurrent accesses by multiple threads. So replace this with an atomic_int. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@gmail.com>
* libavutil: Detect MMI and MSA flags for MIPSJiaxun Yang2020-07-231-0/+10
| | | | | | | | | | | | | | | Add MMI & MSA runtime detection for MIPS. Basically there are two code pathes. For systems that natively support CPUCFG instruction or kernel emulated that instruction, we'll sense this feature from HWCAP and report the flags according to values grab from CPUCFG. For systems that have no CPUCFG (or not export it in HWCAP), we'll parse /proc/cpuinfo instead. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
* avutil: add AVX-512 flagsJames Darnley2017-12-241-1/+5
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* avutil/cpu: split flag checks per arch in av_cpu_max_align()James Almer2017-09-271-31/+8
| | | | Signed-off-by: James Almer <jamrial@gmail.com>
* Merge commit 'e6bff23f1e11aefb16a2b5d6ee72bf7469c5a66e'James Almer2017-09-271-0/+39
|\ | | | | | | | | | | | | | | | | | | * commit 'e6bff23f1e11aefb16a2b5d6ee72bf7469c5a66e': cpu: add a function for querying maximum required data alignment Adapted to work with the arbitrary runtime cpuflag changes av_force_cpu_flags() can generate. Merged-by: James Almer <jamrial@gmail.com>
| * cpu: add a function for querying maximum required data alignmentAnton Khirnov2017-02-111-0/+13
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| * avutil: fix data race in av_get_cpu_flags()Wan-Teh Chang2016-12-081-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the one-time initialization in av_get_cpu_flags() thread-safe. The static variables |flags|, |cpuflags_mask|, and |checked| in libavutil/cpu.c are read and written using normal load and store operations. These are considered as data races. The fix is to use atomic load and store operations. Remove the |checked| variable because the invalid value of -1 for |flags| can be used to indicate the same condition. Rename |flags| to |cpu_flags| and move it to file scope. The fix can be verified by running the libavutil/tests/cpu_init.c test program under ThreadSanitizer: ./configure --toolchain=clang-tsan make libavutil/tests/cpu_init libavutil/tests/cpu_init There should be no warnings from ThreadSanitizer. Co-author: Dmitry Vyukov of Google, who suggested the data race fix. Signed-off-by: Wan-Teh Chang <wtc@google.com>
* | lavu/cpu: disable MMX warning on non x86 platformsClément Bœsch2017-06-291-1/+2
| | | | | | | | | | We have AV_CPU_FLAG_ARMV8 == AV_CPU_FLAG_SSE3 which causes a trigger of this MMX warning on AArch64.
* | avutil: fix data race in av_get_cpu_flags()Wan-Teh Chang2016-12-131-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the one-time initialization in av_get_cpu_flags() thread-safe. The static variable |cpu_flags| in libavutil/cpu.c is read and written using normal load and store operations. These are considered as data races. The fix is to use atomic load and store operations. The fix can be verified by running the libavutil/tests/cpu_init.c test program under ThreadSanitizer: ./configure --toolchain=clang-tsan make libavutil/tests/cpu_init libavutil/tests/cpu_init There should be no warnings from ThreadSanitizer. Co-author: Dmitry Vyukov of Google, who suggested the data race fix. Signed-off-by: Wan-Teh Chang <wtc@google.com> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
* | avutil/cpu: remove the |checked| static variableWan-Teh Chang2016-11-231-19/+21
| | | | | | | | | | | | | | | | | | | | | | Remove the |checked| variable because the invalid value of -1 for |flags| can be used to indicate the same condition. Also rename |flags| to |cpu_flags| because there are a local variable and a function parameter named |flags| in the same file. Co-author: Dmitry Vyukov of Google Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
* | Merge commit 'd12b5b2f135aade4099f4b26b0fe678656158c13'Derek Buitenhuis2016-05-111-127/+0
|\| | | | | | | | | | | | | | | * commit 'd12b5b2f135aade4099f4b26b0fe678656158c13': build: Split test programs off into separate files Some conversions done by: James Almer <jamrial@gmail.com> Merged-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
| * build: Split test programs off into separate filesDiego Biurrun2016-04-071-119/+0
| | | | | | | | | | This avoids spurious library rebuilds when only the test program code is changed and simplifies the build system.
* | avutil/cpu: add missing entry for vfp_vm to av_parse_cpu_capsHendrik Leppkes2016-01-021-0/+1
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* | Merge commit 'e2710e790c09e49e86baa58c6063af0097cc8cb0'Hendrik Leppkes2016-01-021-0/+2
|\| | | | | | | | | | | | | * commit 'e2710e790c09e49e86baa58c6063af0097cc8cb0': arm: add a cpu flag for the VFPv2 vector mode Merged-by: Hendrik Leppkes <h.leppkes@gmail.com>
| * arm: add a cpu flag for the VFPv2 vector modeJanne Grunau2015-12-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The vector mode was deprecated in ARMv7-A/VFPv3 and various cpu implementations do not support it in hardware. Vector mode code will depending the OS either be emulated in software or result in an illegal instruction on cpus which does not support it. This was not really problem in practice since NEON implementations of the same functions are preferred. It will however become a problem for checkasm which tests every cpu flag separately. Since this is a cpu feature newer cpu do not support anymore the behaviour of this flag differs from the other flags. It can be only activated by runtime cpu feature selection.
| * x86: add AV_CPU_FLAG_AVXSLOW flagJames Almer2015-05-311-0/+3
| | | | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
| * avutil: remove pointless bmi1 defineJames Almer2015-04-191-3/+2
| | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com>
| * cpu-test: Add unistd.h #include for getopt()Diego Biurrun2014-08-131-0/+4
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* | lavu: add AESNI CPU flagRodger Combs2015-10-281-0/+4
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* | winrt: multithreading supportwang-bin2015-10-161-1/+7
| | | | | | | | | | | | _beginthreadex is for desktop only. CreateThread is available for windows store apps on windows (and phone) 8.1 and later. http://msdn.microsoft.com/en-us/library/ms682453%28VS.85%29.aspx Signed-off-by: Matt Oliver <protogonoi@gmail.com>
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