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| author | Rémi Denis-Courmont <remi@remlab.net> | 2022-09-26 17:52:21 +0300 |
|---|---|---|
| committer | Lynne <dev@lynne.ee> | 2022-09-27 13:19:52 +0200 |
| commit | b95e2fbd85e93b58d019ad0e3da64a72ee7cc3d5 (patch) | |
| tree | ccf3b030be7df33cf5312936bb017469a3522e68 /libavutil/cpu.c | |
| parent | 179830108dbeb1c6b73105ae2234cf04874728b4 (diff) | |
| download | ffmpeg-b95e2fbd85e93b58d019ad0e3da64a72ee7cc3d5.tar.gz | |
lavu/cpu: detect RISC-V base extensions
This introduces compile-time and run-time CPU detection on RISC-V. In
practice, I doubt that FFmpeg will ever see a RISC-V CPU without all of
I, F and D extensions, and if it does, it probably won't have run-time
detection. So the flags are essentially always set.
But as things stand, checkasm wants them that way. Compare the ARMV8
flag on AArch64. We are nowhere near running short on CPU flag bits.
Diffstat (limited to 'libavutil/cpu.c')
| -rw-r--r-- | libavutil/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/libavutil/cpu.c b/libavutil/cpu.c index 0035e927a5..8b6eef9873 100644 --- a/libavutil/cpu.c +++ b/libavutil/cpu.c @@ -62,6 +62,8 @@ static int get_cpu_flags(void) return ff_get_cpu_flags_arm(); #elif ARCH_PPC return ff_get_cpu_flags_ppc(); +#elif ARCH_RISCV + return ff_get_cpu_flags_riscv(); #elif ARCH_X86 return ff_get_cpu_flags_x86(); #elif ARCH_LOONGARCH @@ -178,6 +180,10 @@ int av_parse_cpu_caps(unsigned *flags, const char *s) #elif ARCH_LOONGARCH { "lsx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX }, .unit = "flags" }, { "lasx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX }, .unit = "flags" }, +#elif ARCH_RISCV + { "rvi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVI }, .unit = "flags" }, + { "rvf", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVF }, .unit = "flags" }, + { "rvd", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVD }, .unit = "flags" }, #endif { NULL }, }; |