1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
|
/*
* utilasm.h
*
*/
#ifndef INCLUDE_UTILASM_H_
#define INCLUDE_UTILASM_H_
#include <roaring/portability.h>
#ifdef __cplusplus
extern "C" { namespace roaring {
#endif
#if defined(CROARING_INLINE_ASM)
#define CROARING_ASMBITMANIPOPTIMIZATION // optimization flag
#define ASM_SHIFT_RIGHT(srcReg, bitsReg, destReg) \
__asm volatile("shrx %1, %2, %0" \
: "=r"(destReg) \
: /* write */ \
"r"(bitsReg), /* read only */ \
"r"(srcReg) /* read only */ \
)
#define ASM_INPLACESHIFT_RIGHT(srcReg, bitsReg) \
__asm volatile("shrx %1, %0, %0" \
: "+r"(srcReg) \
: /* read/write */ \
"r"(bitsReg) /* read only */ \
)
#define ASM_SHIFT_LEFT(srcReg, bitsReg, destReg) \
__asm volatile("shlx %1, %2, %0" \
: "=r"(destReg) \
: /* write */ \
"r"(bitsReg), /* read only */ \
"r"(srcReg) /* read only */ \
)
// set bit at position testBit within testByte to 1 and
// copy cmovDst to cmovSrc if that bit was previously clear
#define ASM_SET_BIT_INC_WAS_CLEAR(testByte, testBit, count) \
__asm volatile( \
"bts %2, %0\n" \
"sbb $-1, %1\n" \
: "+r"(testByte), /* read/write */ \
"+r"(count) \
: /* read/write */ \
"r"(testBit) /* read only */ \
)
#define ASM_CLEAR_BIT_DEC_WAS_SET(testByte, testBit, count) \
__asm volatile( \
"btr %2, %0\n" \
"sbb $0, %1\n" \
: "+r"(testByte), /* read/write */ \
"+r"(count) \
: /* read/write */ \
"r"(testBit) /* read only */ \
)
#define ASM_BT64(testByte, testBit, count) \
__asm volatile( \
"bt %2,%1\n" \
"sbb %0,%0" /*could use setb */ \
: "=r"(count) \
: /* write */ \
"r"(testByte), /* read only */ \
"r"(testBit) /* read only */ \
)
#endif
#ifdef __cplusplus
} } // extern "C" { namespace roaring {
#endif
#endif /* INCLUDE_UTILASM_H_ */
|