add ymake export to ydb

176 files changed, 12827 insertions, 0 deletions

diff --git a/contrib/libs/llvm12/include/ya.make b/contrib/libs/llvm12/include/ya.make
new file mode 100644
index 0000000000..38b79416dc
--- /dev/null
+++ b/contrib/libs/llvm12/include/ya.make
@@ -0,0 +1,3964 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+PROVIDES(llvm)
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    BSD-2-Clause AND
+    NCSA AND
+    Public-Domain AND
+    Unicode-Mappings
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+)
+
+NO_UTIL()
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen --gen-directive-decl -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/Frontend/OpenACC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenACC/ACC.td --write-if-changed -o
+        llvm/Frontend/OpenACC/ACC.h.inc -d llvm/Frontend/OpenACC/ACC.h.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenACC/ACC.td
+    OUTPUT_INCLUDES llvm/ADT/BitmaskEnum.h
+    OUT_NOAUTO llvm/Frontend/OpenACC/ACC.h.inc llvm/Frontend/OpenACC/ACC.h.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen --gen-directive-decl -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/Frontend/OpenMP -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenMP/OMP.td --write-if-changed -o
+        llvm/Frontend/OpenMP/OMP.h.inc -d llvm/Frontend/OpenMP/OMP.h.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenMP/OMP.td
+    OUTPUT_INCLUDES llvm/ADT/BitmaskEnum.h
+    OUT_NOAUTO llvm/Frontend/OpenMP/OMP.h.inc llvm/Frontend/OpenMP/OMP.h.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-attrs -I ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Attributes.td --write-if-changed -o
+        llvm/IR/Attributes.inc -d llvm/IR/Attributes.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/IR/Attributes.td
+    OUT_NOAUTO llvm/IR/Attributes.inc llvm/IR/Attributes.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicEnums.inc -d llvm/IR/IntrinsicEnums.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicEnums.inc llvm/IR/IntrinsicEnums.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-impl -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicImpl.inc -d llvm/IR/IntrinsicImpl.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicImpl.inc llvm/IR/IntrinsicImpl.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=aarch64 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsAArch64.h -d llvm/IR/IntrinsicsAArch64.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsAArch64.h llvm/IR/IntrinsicsAArch64.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=amdgcn -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsAMDGPU.h -d llvm/IR/IntrinsicsAMDGPU.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsAMDGPU.h llvm/IR/IntrinsicsAMDGPU.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=arm -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsARM.h -d llvm/IR/IntrinsicsARM.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsARM.h llvm/IR/IntrinsicsARM.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=bpf -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsBPF.h -d llvm/IR/IntrinsicsBPF.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsBPF.h llvm/IR/IntrinsicsBPF.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=hexagon -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsHexagon.h -d llvm/IR/IntrinsicsHexagon.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsHexagon.h llvm/IR/IntrinsicsHexagon.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=mips -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsMips.h -d llvm/IR/IntrinsicsMips.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsMips.h llvm/IR/IntrinsicsMips.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=nvvm -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsNVPTX.h -d llvm/IR/IntrinsicsNVPTX.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsNVPTX.h llvm/IR/IntrinsicsNVPTX.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=ppc -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsPowerPC.h -d llvm/IR/IntrinsicsPowerPC.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsPowerPC.h llvm/IR/IntrinsicsPowerPC.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=r600 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsR600.h -d llvm/IR/IntrinsicsR600.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsR600.h llvm/IR/IntrinsicsR600.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=riscv -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsRISCV.h -d llvm/IR/IntrinsicsRISCV.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsRISCV.h llvm/IR/IntrinsicsRISCV.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=s390 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsS390.h -d llvm/IR/IntrinsicsS390.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsS390.h llvm/IR/IntrinsicsS390.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=ve -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsVE.h -d llvm/IR/IntrinsicsVE.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsVE.h llvm/IR/IntrinsicsVE.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=wasm -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsWebAssembly.h -d llvm/IR/IntrinsicsWebAssembly.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsWebAssembly.h llvm/IR/IntrinsicsWebAssembly.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=x86 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsX86.h -d llvm/IR/IntrinsicsX86.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsX86.h llvm/IR/IntrinsicsX86.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=xcore -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
+        llvm/IR/IntrinsicsXCore.h -d llvm/IR/IntrinsicsXCore.h.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
+        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
+        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
+        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
+        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
+        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
+        llvm/IR/IntrinsicsXCore.td
+    OUT_NOAUTO llvm/IR/IntrinsicsXCore.h llvm/IR/IntrinsicsXCore.h.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen --gen-directive-impl -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenACC/ACC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenACC/ACC.td
+    OUTPUT_INCLUDES llvm/ADT/StringRef.h llvm/ADT/StringSwitch.h llvm/Frontend/OpenACC/ACC.h.inc
+        llvm/Support/ErrorHandling.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen --gen-directive-impl -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenMP/OMP.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenMP/OMP.td
+    OUTPUT_INCLUDES llvm/ADT/StringRef.h llvm/ADT/StringSwitch.h llvm/Frontend/OpenMP/OMP.h.inc
+        llvm/Support/ErrorHandling.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -asmwriternum=1 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
+        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES _llvm_sstream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-pseudo-lowering -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PostLegalizerCombinerHelper
+        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
+    OUT_NOAUTO
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PostLegalizerLoweringHelper
+        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
+    OUT_NOAUTO
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PreLegalizerCombinerHelper
+        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
+    OUT_NOAUTO
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-searchable-tables -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
+        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
+        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
+        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
+        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
+        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
+        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
+        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES _llvm_sstream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-pseudo-lowering -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-searchable-tables -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
+        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/BPF/BPF.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
+        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES _llvm_sstream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/BPF/BPF.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
+        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
+        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
+        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/PowerPC/PPC.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/PowerPC/PPC.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES _llvm_sstream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
+        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
+        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -asmwriternum=1 -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
+        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-x86-EVEX2VEX-tables -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc.d
+        --long-string-literals=0
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
+        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
+        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
+        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
+        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
+        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
+        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
+        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
+        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
+        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
+        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
+        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
+        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
+        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
+        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
+        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
+        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
+        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
+        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
+    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
+        contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc
+        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/dsymutil -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/dsymutil/Options.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/dsymutil/Options.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-cvtres/Opts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-cvtres/Opts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-lipo -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-ml -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-ml/Opts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-ml/Opts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-mt -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-mt/Opts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-mt/Opts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
+        contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
+        contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.td --write-if-changed -o
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-objcopy/CommonOpts.td
+        contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-objcopy/CommonOpts.td
+        contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-rc -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-rc/Opts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-rc/Opts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc.d
+)
+
+RUN_PROGRAM(
+    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
+        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer -Iinclude
+        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-symbolizer/Opts.td
+        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc -d
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc.d
+    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
+    IN contrib/libs/llvm12/tools/llvm-symbolizer/Opts.td llvm/Option/OptParser.td
+    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc
+        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc.d
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Analysis/ya.make b/contrib/libs/llvm12/lib/Analysis/ya.make
new file mode 100644
index 0000000000..9de20901d6
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Analysis/ya.make
@@ -0,0 +1,146 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Analysis
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AliasAnalysis.cpp
+    AliasAnalysisEvaluator.cpp
+    AliasAnalysisSummary.cpp
+    AliasSetTracker.cpp
+    Analysis.cpp
+    AssumeBundleQueries.cpp
+    AssumptionCache.cpp
+    BasicAliasAnalysis.cpp
+    BlockFrequencyInfo.cpp
+    BlockFrequencyInfoImpl.cpp
+    BranchProbabilityInfo.cpp
+    CFG.cpp
+    CFGPrinter.cpp
+    CFLAndersAliasAnalysis.cpp
+    CFLSteensAliasAnalysis.cpp
+    CGSCCPassManager.cpp
+    CallGraph.cpp
+    CallGraphSCCPass.cpp
+    CallPrinter.cpp
+    CaptureTracking.cpp
+    CmpInstAnalysis.cpp
+    CodeMetrics.cpp
+    ConstantFolding.cpp
+    ConstraintSystem.cpp
+    CostModel.cpp
+    DDG.cpp
+    DDGPrinter.cpp
+    Delinearization.cpp
+    DemandedBits.cpp
+    DependenceAnalysis.cpp
+    DependenceGraphBuilder.cpp
+    DevelopmentModeInlineAdvisor.cpp
+    DivergenceAnalysis.cpp
+    DomPrinter.cpp
+    DomTreeUpdater.cpp
+    DominanceFrontier.cpp
+    EHPersonalities.cpp
+    FunctionPropertiesAnalysis.cpp
+    GlobalsModRef.cpp
+    GuardUtils.cpp
+    HeatUtils.cpp
+    IRSimilarityIdentifier.cpp
+    IVDescriptors.cpp
+    IVUsers.cpp
+    ImportedFunctionsInliningStatistics.cpp
+    IndirectCallPromotionAnalysis.cpp
+    InlineAdvisor.cpp
+    InlineCost.cpp
+    InlineSizeEstimatorAnalysis.cpp
+    InstCount.cpp
+    InstructionPrecedenceTracking.cpp
+    InstructionSimplify.cpp
+    Interval.cpp
+    IntervalPartition.cpp
+    LazyBlockFrequencyInfo.cpp
+    LazyBranchProbabilityInfo.cpp
+    LazyCallGraph.cpp
+    LazyValueInfo.cpp
+    LegacyDivergenceAnalysis.cpp
+    Lint.cpp
+    Loads.cpp
+    LoopAccessAnalysis.cpp
+    LoopAnalysisManager.cpp
+    LoopCacheAnalysis.cpp
+    LoopInfo.cpp
+    LoopNestAnalysis.cpp
+    LoopPass.cpp
+    LoopUnrollAnalyzer.cpp
+    MLInlineAdvisor.cpp
+    MemDepPrinter.cpp
+    MemDerefPrinter.cpp
+    MemoryBuiltins.cpp
+    MemoryDependenceAnalysis.cpp
+    MemoryLocation.cpp
+    MemorySSA.cpp
+    MemorySSAUpdater.cpp
+    ModuleDebugInfoPrinter.cpp
+    ModuleSummaryAnalysis.cpp
+    MustExecute.cpp
+    ObjCARCAliasAnalysis.cpp
+    ObjCARCAnalysisUtils.cpp
+    ObjCARCInstKind.cpp
+    OptimizationRemarkEmitter.cpp
+    PHITransAddr.cpp
+    PhiValues.cpp
+    PostDominators.cpp
+    ProfileSummaryInfo.cpp
+    PtrUseVisitor.cpp
+    RegionInfo.cpp
+    RegionPass.cpp
+    RegionPrinter.cpp
+    ReleaseModeModelRunner.cpp
+    ReplayInlineAdvisor.cpp
+    ScalarEvolution.cpp
+    ScalarEvolutionAliasAnalysis.cpp
+    ScalarEvolutionDivision.cpp
+    ScalarEvolutionNormalization.cpp
+    ScopedNoAliasAA.cpp
+    StackLifetime.cpp
+    StackSafetyAnalysis.cpp
+    SyncDependenceAnalysis.cpp
+    SyntheticCountsUtils.cpp
+    TFUtils.cpp
+    TargetLibraryInfo.cpp
+    TargetTransformInfo.cpp
+    Trace.cpp
+    TypeBasedAliasAnalysis.cpp
+    TypeMetadataUtils.cpp
+    VFABIDemangling.cpp
+    ValueLattice.cpp
+    ValueLatticeUtils.cpp
+    ValueTracking.cpp
+    VectorUtils.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/AsmParser/ya.make b/contrib/libs/llvm12/lib/AsmParser/ya.make
new file mode 100644
index 0000000000..5a2ed51a71
--- /dev/null
+++ b/contrib/libs/llvm12/lib/AsmParser/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    LLLexer.cpp
+    LLParser.cpp
+    Parser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/BinaryFormat/ya.make b/contrib/libs/llvm12/lib/BinaryFormat/ya.make
new file mode 100644
index 0000000000..c466edfa5c
--- /dev/null
+++ b/contrib/libs/llvm12/lib/BinaryFormat/ya.make
@@ -0,0 +1,39 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/BinaryFormat
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AMDGPUMetadataVerifier.cpp
+    Dwarf.cpp
+    MachO.cpp
+    Magic.cpp
+    Minidump.cpp
+    MsgPackDocument.cpp
+    MsgPackDocumentYAML.cpp
+    MsgPackReader.cpp
+    MsgPackWriter.cpp
+    Wasm.cpp
+    XCOFF.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make b/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make
new file mode 100644
index 0000000000..5ff600cff8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Bitcode/Reader
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BitReader.cpp
+    BitcodeAnalyzer.cpp
+    BitcodeReader.cpp
+    MetadataLoader.cpp
+    ValueList.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make b/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make
new file mode 100644
index 0000000000..3a4ff16476
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make
@@ -0,0 +1,34 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Bitcode/Writer
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BitWriter.cpp
+    BitcodeWriter.cpp
+    BitcodeWriterPass.cpp
+    ValueEnumerator.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make b/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make
new file mode 100644
index 0000000000..db6b43a8cb
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Bitstream/Reader
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BitstreamReader.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make b/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make
new file mode 100644
index 0000000000..d0236557d8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make
@@ -0,0 +1,70 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+)
+
+IF (SANITIZER_TYPE == "undefined")
+    PEERDIR(
+        contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    )
+ENDIF()
+
+ADDINCL(
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AIXException.cpp
+    ARMException.cpp
+    AccelTable.cpp
+    AddressPool.cpp
+    AsmPrinter.cpp
+    AsmPrinterDwarf.cpp
+    AsmPrinterInlineAsm.cpp
+    CodeViewDebug.cpp
+    DIE.cpp
+    DIEHash.cpp
+    DbgEntityHistoryCalculator.cpp
+    DebugHandlerBase.cpp
+    DebugLocStream.cpp
+    DwarfCFIException.cpp
+    DwarfCompileUnit.cpp
+    DwarfDebug.cpp
+    DwarfExpression.cpp
+    DwarfFile.cpp
+    DwarfStringPool.cpp
+    DwarfUnit.cpp
+    EHStreamer.cpp
+    ErlangGCPrinter.cpp
+    OcamlGCPrinter.cpp
+    PseudoProbePrinter.cpp
+    WasmException.cpp
+    WinCFGuard.cpp
+    WinException.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make b/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make
new file mode 100644
index 0000000000..d4ee068aff
--- /dev/null
+++ b/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make
@@ -0,0 +1,57 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CSEInfo.cpp
+    CSEMIRBuilder.cpp
+    CallLowering.cpp
+    Combiner.cpp
+    CombinerHelper.cpp
+    GISelChangeObserver.cpp
+    GISelKnownBits.cpp
+    GlobalISel.cpp
+    IRTranslator.cpp
+    InlineAsmLowering.cpp
+    InstructionSelect.cpp
+    InstructionSelector.cpp
+    LegalityPredicates.cpp
+    LegalizeMutations.cpp
+    Legalizer.cpp
+    LegalizerHelper.cpp
+    LegalizerInfo.cpp
+    Localizer.cpp
+    LostDebugLocObserver.cpp
+    MachineIRBuilder.cpp
+    RegBankSelect.cpp
+    RegisterBank.cpp
+    RegisterBankInfo.cpp
+    Utils.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make b/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
new file mode 100644
index 0000000000..18f32c7f8d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/CodeGen/MIRParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    MILexer.cpp
+    MIParser.cpp
+    MIRParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make b/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make
new file mode 100644
index 0000000000..09d4c52f8f
--- /dev/null
+++ b/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make
@@ -0,0 +1,57 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DAGCombiner.cpp
+    FastISel.cpp
+    FunctionLoweringInfo.cpp
+    InstrEmitter.cpp
+    LegalizeDAG.cpp
+    LegalizeFloatTypes.cpp
+    LegalizeIntegerTypes.cpp
+    LegalizeTypes.cpp
+    LegalizeTypesGeneric.cpp
+    LegalizeVectorOps.cpp
+    LegalizeVectorTypes.cpp
+    ResourcePriorityQueue.cpp
+    ScheduleDAGFast.cpp
+    ScheduleDAGRRList.cpp
+    ScheduleDAGSDNodes.cpp
+    ScheduleDAGVLIW.cpp
+    SelectionDAG.cpp
+    SelectionDAGAddressAnalysis.cpp
+    SelectionDAGBuilder.cpp
+    SelectionDAGDumper.cpp
+    SelectionDAGISel.cpp
+    SelectionDAGPrinter.cpp
+    SelectionDAGTargetInfo.cpp
+    StatepointLowering.cpp
+    TargetLowering.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/ya.make b/contrib/libs/llvm12/lib/CodeGen/ya.make
new file mode 100644
index 0000000000..249a95e5eb
--- /dev/null
+++ b/contrib/libs/llvm12/lib/CodeGen/ya.make
@@ -0,0 +1,228 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/CodeGen
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AggressiveAntiDepBreaker.cpp
+    AllocationOrder.cpp
+    Analysis.cpp
+    AtomicExpandPass.cpp
+    BasicBlockSections.cpp
+    BasicTargetTransformInfo.cpp
+    BranchFolding.cpp
+    BranchRelaxation.cpp
+    BreakFalseDeps.cpp
+    BuiltinGCs.cpp
+    CFGuardLongjmp.cpp
+    CFIInstrInserter.cpp
+    CalcSpillWeights.cpp
+    CallingConvLower.cpp
+    CodeGen.cpp
+    CodeGenPassBuilder.cpp
+    CodeGenPrepare.cpp
+    CommandFlags.cpp
+    CriticalAntiDepBreaker.cpp
+    DFAPacketizer.cpp
+    DeadMachineInstructionElim.cpp
+    DetectDeadLanes.cpp
+    DwarfEHPrepare.cpp
+    EarlyIfConversion.cpp
+    EdgeBundles.cpp
+    ExecutionDomainFix.cpp
+    ExpandMemCmp.cpp
+    ExpandPostRAPseudos.cpp
+    ExpandReductions.cpp
+    FEntryInserter.cpp
+    FaultMaps.cpp
+    FinalizeISel.cpp
+    FixupStatepointCallerSaved.cpp
+    FuncletLayout.cpp
+    GCMetadata.cpp
+    GCMetadataPrinter.cpp
+    GCRootLowering.cpp
+    GCStrategy.cpp
+    GlobalMerge.cpp
+    HardwareLoops.cpp
+    IfConversion.cpp
+    ImplicitNullChecks.cpp
+    IndirectBrExpandPass.cpp
+    InlineSpiller.cpp
+    InterferenceCache.cpp
+    InterleavedAccessPass.cpp
+    InterleavedLoadCombinePass.cpp
+    IntrinsicLowering.cpp
+    LLVMTargetMachine.cpp
+    LatencyPriorityQueue.cpp
+    LazyMachineBlockFrequencyInfo.cpp
+    LexicalScopes.cpp
+    LiveDebugValues/InstrRefBasedImpl.cpp
+    LiveDebugValues/LiveDebugValues.cpp
+    LiveDebugValues/VarLocBasedImpl.cpp
+    LiveDebugVariables.cpp
+    LiveInterval.cpp
+    LiveIntervalCalc.cpp
+    LiveIntervalUnion.cpp
+    LiveIntervals.cpp
+    LivePhysRegs.cpp
+    LiveRangeCalc.cpp
+    LiveRangeEdit.cpp
+    LiveRangeShrink.cpp
+    LiveRegMatrix.cpp
+    LiveRegUnits.cpp
+    LiveStacks.cpp
+    LiveVariables.cpp
+    LocalStackSlotAllocation.cpp
+    LoopTraversal.cpp
+    LowLevelType.cpp
+    LowerEmuTLS.cpp
+    MBFIWrapper.cpp
+    MIRCanonicalizerPass.cpp
+    MIRNamerPass.cpp
+    MIRPrinter.cpp
+    MIRPrintingPass.cpp
+    MIRVRegNamerUtils.cpp
+    MachineBasicBlock.cpp
+    MachineBlockFrequencyInfo.cpp
+    MachineBlockPlacement.cpp
+    MachineBranchProbabilityInfo.cpp
+    MachineCSE.cpp
+    MachineCheckDebugify.cpp
+    MachineCombiner.cpp
+    MachineCopyPropagation.cpp
+    MachineDebugify.cpp
+    MachineDominanceFrontier.cpp
+    MachineDominators.cpp
+    MachineFrameInfo.cpp
+    MachineFunction.cpp
+    MachineFunctionPass.cpp
+    MachineFunctionPrinterPass.cpp
+    MachineFunctionSplitter.cpp
+    MachineInstr.cpp
+    MachineInstrBundle.cpp
+    MachineLICM.cpp
+    MachineLoopInfo.cpp
+    MachineLoopUtils.cpp
+    MachineModuleInfo.cpp
+    MachineModuleInfoImpls.cpp
+    MachineOperand.cpp
+    MachineOptimizationRemarkEmitter.cpp
+    MachineOutliner.cpp
+    MachinePassManager.cpp
+    MachinePipeliner.cpp
+    MachinePostDominators.cpp
+    MachineRegionInfo.cpp
+    MachineRegisterInfo.cpp
+    MachineSSAUpdater.cpp
+    MachineScheduler.cpp
+    MachineSink.cpp
+    MachineSizeOpts.cpp
+    MachineStableHash.cpp
+    MachineStripDebug.cpp
+    MachineTraceMetrics.cpp
+    MachineVerifier.cpp
+    MacroFusion.cpp
+    ModuloSchedule.cpp
+    MultiHazardRecognizer.cpp
+    NonRelocatableStringpool.cpp
+    OptimizePHIs.cpp
+    PHIElimination.cpp
+    PHIEliminationUtils.cpp
+    ParallelCG.cpp
+    PatchableFunction.cpp
+    PeepholeOptimizer.cpp
+    PostRAHazardRecognizer.cpp
+    PostRASchedulerList.cpp
+    PreISelIntrinsicLowering.cpp
+    ProcessImplicitDefs.cpp
+    PrologEpilogInserter.cpp
+    PseudoProbeInserter.cpp
+    PseudoSourceValue.cpp
+    RDFGraph.cpp
+    RDFLiveness.cpp
+    RDFRegisters.cpp
+    ReachingDefAnalysis.cpp
+    RegAllocBase.cpp
+    RegAllocBasic.cpp
+    RegAllocFast.cpp
+    RegAllocGreedy.cpp
+    RegAllocPBQP.cpp
+    RegUsageInfoCollector.cpp
+    RegUsageInfoPropagate.cpp
+    RegisterClassInfo.cpp
+    RegisterCoalescer.cpp
+    RegisterPressure.cpp
+    RegisterScavenging.cpp
+    RegisterUsageInfo.cpp
+    RenameIndependentSubregs.cpp
+    ResetMachineFunctionPass.cpp
+    SafeStack.cpp
+    SafeStackLayout.cpp
+    ScheduleDAG.cpp
+    ScheduleDAGInstrs.cpp
+    ScheduleDAGPrinter.cpp
+    ScoreboardHazardRecognizer.cpp
+    ShadowStackGCLowering.cpp
+    ShrinkWrap.cpp
+    SjLjEHPrepare.cpp
+    SlotIndexes.cpp
+    SpillPlacement.cpp
+    SplitKit.cpp
+    StackColoring.cpp
+    StackMapLivenessAnalysis.cpp
+    StackMaps.cpp
+    StackProtector.cpp
+    StackSlotColoring.cpp
+    SwiftErrorValueTracking.cpp
+    SwitchLoweringUtils.cpp
+    TailDuplication.cpp
+    TailDuplicator.cpp
+    TargetFrameLoweringImpl.cpp
+    TargetInstrInfo.cpp
+    TargetLoweringBase.cpp
+    TargetLoweringObjectFileImpl.cpp
+    TargetOptionsImpl.cpp
+    TargetPassConfig.cpp
+    TargetRegisterInfo.cpp
+    TargetSchedule.cpp
+    TargetSubtargetInfo.cpp
+    TwoAddressInstructionPass.cpp
+    TypePromotion.cpp
+    UnreachableBlockElim.cpp
+    ValueTypes.cpp
+    VirtRegMap.cpp
+    WasmEHPrepare.cpp
+    WinEHPrepare.cpp
+    XRayInstrumentation.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DWARFLinker/ya.make b/contrib/libs/llvm12/lib/DWARFLinker/ya.make
new file mode 100644
index 0000000000..f1b7585231
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DWARFLinker/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DWARFLinker
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DWARFLinker.cpp
+    DWARFLinkerCompileUnit.cpp
+    DWARFLinkerDeclContext.cpp
+    DWARFStreamer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make b/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make
new file mode 100644
index 0000000000..45ae58845e
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make
@@ -0,0 +1,66 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AppendingTypeTableBuilder.cpp
+    CVSymbolVisitor.cpp
+    CVTypeVisitor.cpp
+    CodeViewError.cpp
+    CodeViewRecordIO.cpp
+    ContinuationRecordBuilder.cpp
+    DebugChecksumsSubsection.cpp
+    DebugCrossExSubsection.cpp
+    DebugCrossImpSubsection.cpp
+    DebugFrameDataSubsection.cpp
+    DebugInlineeLinesSubsection.cpp
+    DebugLinesSubsection.cpp
+    DebugStringTableSubsection.cpp
+    DebugSubsection.cpp
+    DebugSubsectionRecord.cpp
+    DebugSubsectionVisitor.cpp
+    DebugSymbolRVASubsection.cpp
+    DebugSymbolsSubsection.cpp
+    EnumTables.cpp
+    Formatters.cpp
+    GlobalTypeTableBuilder.cpp
+    LazyRandomTypeCollection.cpp
+    Line.cpp
+    MergingTypeTableBuilder.cpp
+    RecordName.cpp
+    RecordSerialization.cpp
+    SimpleTypeSerializer.cpp
+    StringsAndChecksums.cpp
+    SymbolDumper.cpp
+    SymbolRecordHelpers.cpp
+    SymbolRecordMapping.cpp
+    SymbolSerializer.cpp
+    TypeDumpVisitor.cpp
+    TypeHashing.cpp
+    TypeIndex.cpp
+    TypeIndexDiscovery.cpp
+    TypeRecordHelpers.cpp
+    TypeRecordMapping.cpp
+    TypeStreamMerger.cpp
+    TypeTableCollection.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make b/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make
new file mode 100644
index 0000000000..22f831fb25
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make
@@ -0,0 +1,56 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DWARFAbbreviationDeclaration.cpp
+    DWARFAcceleratorTable.cpp
+    DWARFAddressRange.cpp
+    DWARFCompileUnit.cpp
+    DWARFContext.cpp
+    DWARFDataExtractor.cpp
+    DWARFDebugAbbrev.cpp
+    DWARFDebugAddr.cpp
+    DWARFDebugArangeSet.cpp
+    DWARFDebugAranges.cpp
+    DWARFDebugFrame.cpp
+    DWARFDebugInfoEntry.cpp
+    DWARFDebugLine.cpp
+    DWARFDebugLoc.cpp
+    DWARFDebugMacro.cpp
+    DWARFDebugPubTable.cpp
+    DWARFDebugRangeList.cpp
+    DWARFDebugRnglists.cpp
+    DWARFDie.cpp
+    DWARFExpression.cpp
+    DWARFFormValue.cpp
+    DWARFGdbIndex.cpp
+    DWARFListTable.cpp
+    DWARFLocationExpression.cpp
+    DWARFTypeUnit.cpp
+    DWARFUnit.cpp
+    DWARFUnitIndex.cpp
+    DWARFVerifier.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/GSYM/ya.make b/contrib/libs/llvm12/lib/DebugInfo/GSYM/ya.make
new file mode 100644
index 0000000000..ea351dc059
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/GSYM/ya.make
@@ -0,0 +1,42 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/GSYM
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DwarfTransformer.cpp
+    FileWriter.cpp
+    FunctionInfo.cpp
+    GsymCreator.cpp
+    GsymReader.cpp
+    Header.cpp
+    InlineInfo.cpp
+    LineTable.cpp
+    LookupResult.cpp
+    ObjectFileTransformer.cpp
+    Range.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make b/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make
new file mode 100644
index 0000000000..97bc6950ae
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    MSFBuilder.cpp
+    MSFCommon.cpp
+    MSFError.cpp
+    MappedBlockStream.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make b/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make
new file mode 100644
index 0000000000..73179cd5ed
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make
@@ -0,0 +1,119 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    GenericError.cpp
+    IPDBSourceFile.cpp
+    Native/DbiModuleDescriptor.cpp
+    Native/DbiModuleDescriptorBuilder.cpp
+    Native/DbiModuleList.cpp
+    Native/DbiStream.cpp
+    Native/DbiStreamBuilder.cpp
+    Native/EnumTables.cpp
+    Native/GSIStreamBuilder.cpp
+    Native/GlobalsStream.cpp
+    Native/Hash.cpp
+    Native/HashTable.cpp
+    Native/InfoStream.cpp
+    Native/InfoStreamBuilder.cpp
+    Native/InjectedSourceStream.cpp
+    Native/ModuleDebugStream.cpp
+    Native/NamedStreamMap.cpp
+    Native/NativeCompilandSymbol.cpp
+    Native/NativeEnumGlobals.cpp
+    Native/NativeEnumInjectedSources.cpp
+    Native/NativeEnumLineNumbers.cpp
+    Native/NativeEnumModules.cpp
+    Native/NativeEnumSymbols.cpp
+    Native/NativeEnumTypes.cpp
+    Native/NativeExeSymbol.cpp
+    Native/NativeFunctionSymbol.cpp
+    Native/NativeInlineSiteSymbol.cpp
+    Native/NativeLineNumber.cpp
+    Native/NativePublicSymbol.cpp
+    Native/NativeRawSymbol.cpp
+    Native/NativeSession.cpp
+    Native/NativeSourceFile.cpp
+    Native/NativeSymbolEnumerator.cpp
+    Native/NativeTypeArray.cpp
+    Native/NativeTypeBuiltin.cpp
+    Native/NativeTypeEnum.cpp
+    Native/NativeTypeFunctionSig.cpp
+    Native/NativeTypePointer.cpp
+    Native/NativeTypeTypedef.cpp
+    Native/NativeTypeUDT.cpp
+    Native/NativeTypeVTShape.cpp
+    Native/PDBFile.cpp
+    Native/PDBFileBuilder.cpp
+    Native/PDBStringTable.cpp
+    Native/PDBStringTableBuilder.cpp
+    Native/PublicsStream.cpp
+    Native/RawError.cpp
+    Native/SymbolCache.cpp
+    Native/SymbolStream.cpp
+    Native/TpiHashing.cpp
+    Native/TpiStream.cpp
+    Native/TpiStreamBuilder.cpp
+    PDB.cpp
+    PDBContext.cpp
+    PDBExtras.cpp
+    PDBInterfaceAnchors.cpp
+    PDBSymDumper.cpp
+    PDBSymbol.cpp
+    PDBSymbolAnnotation.cpp
+    PDBSymbolBlock.cpp
+    PDBSymbolCompiland.cpp
+    PDBSymbolCompilandDetails.cpp
+    PDBSymbolCompilandEnv.cpp
+    PDBSymbolCustom.cpp
+    PDBSymbolData.cpp
+    PDBSymbolExe.cpp
+    PDBSymbolFunc.cpp
+    PDBSymbolFuncDebugEnd.cpp
+    PDBSymbolFuncDebugStart.cpp
+    PDBSymbolLabel.cpp
+    PDBSymbolPublicSymbol.cpp
+    PDBSymbolThunk.cpp
+    PDBSymbolTypeArray.cpp
+    PDBSymbolTypeBaseClass.cpp
+    PDBSymbolTypeBuiltin.cpp
+    PDBSymbolTypeCustom.cpp
+    PDBSymbolTypeDimension.cpp
+    PDBSymbolTypeEnum.cpp
+    PDBSymbolTypeFriend.cpp
+    PDBSymbolTypeFunctionArg.cpp
+    PDBSymbolTypeFunctionSig.cpp
+    PDBSymbolTypeManaged.cpp
+    PDBSymbolTypePointer.cpp
+    PDBSymbolTypeTypedef.cpp
+    PDBSymbolTypeUDT.cpp
+    PDBSymbolTypeVTable.cpp
+    PDBSymbolTypeVTableShape.cpp
+    PDBSymbolUnknown.cpp
+    PDBSymbolUsingNamespace.cpp
+    UDTLayout.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make b/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make
new file mode 100644
index 0000000000..6485cf4ff8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DIPrinter.cpp
+    SymbolizableObjectFile.cpp
+    Symbolize.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Demangle/ya.make b/contrib/libs/llvm12/lib/Demangle/ya.make
new file mode 100644
index 0000000000..c4e86534c4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Demangle/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Demangle
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Demangle.cpp
+    ItaniumDemangle.cpp
+    MicrosoftDemangle.cpp
+    MicrosoftDemangleNodes.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/Interpreter/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/Interpreter/ya.make
new file mode 100644
index 0000000000..b220f79fc9
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/Interpreter/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/restricted/libffi
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/Interpreter
+    contrib/restricted/libffi/include
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Execution.cpp
+    ExternalFunctions.cpp
+    Interpreter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/JITLink/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/JITLink/ya.make
new file mode 100644
index 0000000000..fcf5d777bd
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/JITLink/ya.make
@@ -0,0 +1,41 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/JITLink
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    EHFrameSupport.cpp
+    ELF.cpp
+    ELF_x86_64.cpp
+    JITLink.cpp
+    JITLinkGeneric.cpp
+    JITLinkMemoryManager.cpp
+    MachO.cpp
+    MachOLinkGraphBuilder.cpp
+    MachO_arm64.cpp
+    MachO_x86_64.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make
new file mode 100644
index 0000000000..c5977afd20
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/MCJIT
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    MCJIT.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared/ya.make
new file mode 100644
index 0000000000..194fbb6084
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    OrcError.cpp
+    RPCError.cpp
+    TargetProcessControlTypes.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess/ya.make
new file mode 100644
index 0000000000..a6b83e52d3
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    RegisterEHFrames.cpp
+    TargetExecutionUtils.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/Orc/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/ya.make
new file mode 100644
index 0000000000..906fa42647
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/Orc/ya.make
@@ -0,0 +1,66 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/JITLink
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CompileOnDemandLayer.cpp
+    CompileUtils.cpp
+    Core.cpp
+    DebugUtils.cpp
+    ExecutionUtils.cpp
+    IRCompileLayer.cpp
+    IRTransformLayer.cpp
+    IndirectionUtils.cpp
+    JITTargetMachineBuilder.cpp
+    LLJIT.cpp
+    Layer.cpp
+    LazyReexports.cpp
+    MachOPlatform.cpp
+    Mangling.cpp
+    ObjectLinkingLayer.cpp
+    ObjectTransformLayer.cpp
+    OrcABISupport.cpp
+    OrcV2CBindings.cpp
+    RTDyldObjectLinkingLayer.cpp
+    SpeculateAnalyses.cpp
+    Speculation.cpp
+    TPCDynamicLibrarySearchGenerator.cpp
+    TPCEHFrameRegistrar.cpp
+    TPCIndirectionUtils.cpp
+    TargetProcessControl.cpp
+    ThreadSafeModule.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make
new file mode 100644
index 0000000000..37edec50f2
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PerfJITEventListener.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make
new file mode 100644
index 0000000000..3690585316
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make
@@ -0,0 +1,37 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    JITSymbol.cpp
+    RTDyldMemoryManager.cpp
+    RuntimeDyld.cpp
+    RuntimeDyldCOFF.cpp
+    RuntimeDyldChecker.cpp
+    RuntimeDyldELF.cpp
+    RuntimeDyldMachO.cpp
+    Targets/RuntimeDyldELFMips.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/ya.make
new file mode 100644
index 0000000000..bae8044455
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ExecutionEngine/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ExecutionEngine
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ExecutionEngine.cpp
+    ExecutionEngineBindings.cpp
+    GDBRegistrationListener.cpp
+    SectionMemoryManager.cpp
+    TargetSelect.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Extensions/ya.make b/contrib/libs/llvm12/lib/Extensions/ya.make
new file mode 100644
index 0000000000..44fc60b9b7
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Extensions/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+WITHOUT_LICENSE_TEXTS()
+
+LICENSE(NCSA)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Extensions
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Extensions.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/FileCheck/ya.make b/contrib/libs/llvm12/lib/FileCheck/ya.make
new file mode 100644
index 0000000000..91aff3f22b
--- /dev/null
+++ b/contrib/libs/llvm12/lib/FileCheck/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/FileCheck
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    FileCheck.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Frontend/OpenACC/ya.make b/contrib/libs/llvm12/lib/Frontend/OpenACC/ya.make
new file mode 100644
index 0000000000..3e980f094d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Frontend/OpenACC/ya.make
@@ -0,0 +1,23 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+WITHOUT_LICENSE_TEXTS()
+
+LICENSE(NCSA)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Support
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ACC.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make b/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make
new file mode 100644
index 0000000000..03e41c95f0
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    OMP.cpp
+    OMPContext.cpp
+    OMPIRBuilder.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/FuzzMutate/ya.make b/contrib/libs/llvm12/lib/FuzzMutate/ya.make
new file mode 100644
index 0000000000..0eaf9bc707
--- /dev/null
+++ b/contrib/libs/llvm12/lib/FuzzMutate/ya.make
@@ -0,0 +1,37 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/Scalar
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/FuzzMutate
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    FuzzerCLI.cpp
+    IRMutator.cpp
+    OpDescriptor.cpp
+    Operations.cpp
+    RandomIRBuilder.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/IR/ya.make b/contrib/libs/llvm12/lib/IR/ya.make
new file mode 100644
index 0000000000..06b802c338
--- /dev/null
+++ b/contrib/libs/llvm12/lib/IR/ya.make
@@ -0,0 +1,88 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/IR
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AbstractCallSite.cpp
+    AsmWriter.cpp
+    Assumptions.cpp
+    Attributes.cpp
+    AutoUpgrade.cpp
+    BasicBlock.cpp
+    Comdat.cpp
+    ConstantFold.cpp
+    ConstantRange.cpp
+    Constants.cpp
+    Core.cpp
+    DIBuilder.cpp
+    DataLayout.cpp
+    DebugInfo.cpp
+    DebugInfoMetadata.cpp
+    DebugLoc.cpp
+    DiagnosticHandler.cpp
+    DiagnosticInfo.cpp
+    DiagnosticPrinter.cpp
+    Dominators.cpp
+    FPEnv.cpp
+    Function.cpp
+    GVMaterializer.cpp
+    Globals.cpp
+    IRBuilder.cpp
+    IRPrintingPasses.cpp
+    InlineAsm.cpp
+    Instruction.cpp
+    Instructions.cpp
+    IntrinsicInst.cpp
+    LLVMContext.cpp
+    LLVMContextImpl.cpp
+    LLVMRemarkStreamer.cpp
+    LegacyPassManager.cpp
+    MDBuilder.cpp
+    Mangler.cpp
+    Metadata.cpp
+    Module.cpp
+    ModuleSummaryIndex.cpp
+    Operator.cpp
+    OptBisect.cpp
+    Pass.cpp
+    PassInstrumentation.cpp
+    PassManager.cpp
+    PassRegistry.cpp
+    PassTimingInfo.cpp
+    PrintPasses.cpp
+    ProfileSummary.cpp
+    PseudoProbe.cpp
+    ReplaceConstant.cpp
+    SafepointIRVerifier.cpp
+    Statepoint.cpp
+    StructuralHash.cpp
+    Type.cpp
+    TypeFinder.cpp
+    Use.cpp
+    User.cpp
+    Value.cpp
+    ValueSymbolTable.cpp
+    Verifier.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/IRReader/ya.make b/contrib/libs/llvm12/lib/IRReader/ya.make
new file mode 100644
index 0000000000..59869e2e81
--- /dev/null
+++ b/contrib/libs/llvm12/lib/IRReader/ya.make
@@ -0,0 +1,30 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/IRReader
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    IRReader.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/InterfaceStub/ya.make b/contrib/libs/llvm12/lib/InterfaceStub/ya.make
new file mode 100644
index 0000000000..9613dc0551
--- /dev/null
+++ b/contrib/libs/llvm12/lib/InterfaceStub/ya.make
@@ -0,0 +1,30 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/InterfaceStub
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ELFObjHandler.cpp
+    ELFStub.cpp
+    TBEHandler.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/LTO/ya.make b/contrib/libs/llvm12/lib/LTO/ya.make
new file mode 100644
index 0000000000..2b497202de
--- /dev/null
+++ b/contrib/libs/llvm12/lib/LTO/ya.make
@@ -0,0 +1,55 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/Extensions
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/LTO
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Caching.cpp
+    LTO.cpp
+    LTOBackend.cpp
+    LTOCodeGenerator.cpp
+    LTOModule.cpp
+    SummaryBasedOptimizations.cpp
+    ThinLTOCodeGenerator.cpp
+    UpdateCompilerUsed.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/LineEditor/ya.make b/contrib/libs/llvm12/lib/LineEditor/ya.make
new file mode 100644
index 0000000000..ae06d84afa
--- /dev/null
+++ b/contrib/libs/llvm12/lib/LineEditor/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/LineEditor
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    LineEditor.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Linker/ya.make b/contrib/libs/llvm12/lib/Linker/ya.make
new file mode 100644
index 0000000000..38387e713e
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Linker/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Linker
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    IRMover.cpp
+    LinkModules.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make b/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make
new file mode 100644
index 0000000000..e7c1ed4e0d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Disassembler.cpp
+    MCDisassembler.cpp
+    MCExternalSymbolizer.cpp
+    MCRelocationInfo.cpp
+    MCSymbolizer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/MC/MCParser/ya.make b/contrib/libs/llvm12/lib/MC/MCParser/ya.make
new file mode 100644
index 0000000000..2f2ef4bc86
--- /dev/null
+++ b/contrib/libs/llvm12/lib/MC/MCParser/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/MC/MCParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AsmLexer.cpp
+    AsmParser.cpp
+    COFFAsmParser.cpp
+    COFFMasmParser.cpp
+    DarwinAsmParser.cpp
+    ELFAsmParser.cpp
+    MCAsmLexer.cpp
+    MCAsmParser.cpp
+    MCAsmParserExtension.cpp
+    MCTargetAsmParser.cpp
+    MasmParser.cpp
+    WasmAsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/MC/ya.make b/contrib/libs/llvm12/lib/MC/ya.make
new file mode 100644
index 0000000000..a6045371c2
--- /dev/null
+++ b/contrib/libs/llvm12/lib/MC/ya.make
@@ -0,0 +1,90 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/MC
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ConstantPools.cpp
+    ELFObjectWriter.cpp
+    MCAsmBackend.cpp
+    MCAsmInfo.cpp
+    MCAsmInfoCOFF.cpp
+    MCAsmInfoDarwin.cpp
+    MCAsmInfoELF.cpp
+    MCAsmInfoWasm.cpp
+    MCAsmInfoXCOFF.cpp
+    MCAsmMacro.cpp
+    MCAsmStreamer.cpp
+    MCAssembler.cpp
+    MCCodeEmitter.cpp
+    MCCodeView.cpp
+    MCContext.cpp
+    MCDwarf.cpp
+    MCELFObjectTargetWriter.cpp
+    MCELFStreamer.cpp
+    MCExpr.cpp
+    MCFragment.cpp
+    MCInst.cpp
+    MCInstPrinter.cpp
+    MCInstrAnalysis.cpp
+    MCInstrDesc.cpp
+    MCInstrInfo.cpp
+    MCLabel.cpp
+    MCLinkerOptimizationHint.cpp
+    MCMachOStreamer.cpp
+    MCMachObjectTargetWriter.cpp
+    MCNullStreamer.cpp
+    MCObjectFileInfo.cpp
+    MCObjectStreamer.cpp
+    MCObjectWriter.cpp
+    MCPseudoProbe.cpp
+    MCRegisterInfo.cpp
+    MCSchedule.cpp
+    MCSection.cpp
+    MCSectionCOFF.cpp
+    MCSectionELF.cpp
+    MCSectionMachO.cpp
+    MCSectionWasm.cpp
+    MCSectionXCOFF.cpp
+    MCStreamer.cpp
+    MCSubtargetInfo.cpp
+    MCSymbol.cpp
+    MCSymbolELF.cpp
+    MCSymbolXCOFF.cpp
+    MCTargetOptions.cpp
+    MCTargetOptionsCommandFlags.cpp
+    MCValue.cpp
+    MCWasmObjectTargetWriter.cpp
+    MCWasmStreamer.cpp
+    MCWin64EH.cpp
+    MCWinCOFFStreamer.cpp
+    MCWinEH.cpp
+    MCXCOFFObjectTargetWriter.cpp
+    MCXCOFFStreamer.cpp
+    MachObjectWriter.cpp
+    StringTableBuilder.cpp
+    SubtargetFeature.cpp
+    WasmObjectWriter.cpp
+    WinCOFFObjectWriter.cpp
+    XCOFFObjectWriter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/MCA/ya.make b/contrib/libs/llvm12/lib/MCA/ya.make
new file mode 100644
index 0000000000..7163e157b8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/MCA/ya.make
@@ -0,0 +1,46 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/MCA
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CodeEmitter.cpp
+    Context.cpp
+    HWEventListener.cpp
+    HardwareUnits/HardwareUnit.cpp
+    HardwareUnits/LSUnit.cpp
+    HardwareUnits/RegisterFile.cpp
+    HardwareUnits/ResourceManager.cpp
+    HardwareUnits/RetireControlUnit.cpp
+    HardwareUnits/Scheduler.cpp
+    InstrBuilder.cpp
+    Instruction.cpp
+    Pipeline.cpp
+    Stages/DispatchStage.cpp
+    Stages/EntryStage.cpp
+    Stages/ExecuteStage.cpp
+    Stages/InstructionTables.cpp
+    Stages/MicroOpQueueStage.cpp
+    Stages/RetireStage.cpp
+    Stages/Stage.cpp
+    Support.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Object/ya.make b/contrib/libs/llvm12/lib/Object/ya.make
new file mode 100644
index 0000000000..d4bee3d027
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Object/ya.make
@@ -0,0 +1,61 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Object
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Archive.cpp
+    ArchiveWriter.cpp
+    Binary.cpp
+    COFFImportFile.cpp
+    COFFModuleDefinition.cpp
+    COFFObjectFile.cpp
+    Decompressor.cpp
+    ELF.cpp
+    ELFObjectFile.cpp
+    Error.cpp
+    IRObjectFile.cpp
+    IRSymtab.cpp
+    MachOObjectFile.cpp
+    MachOUniversal.cpp
+    MachOUniversalWriter.cpp
+    Minidump.cpp
+    ModuleSymbolTable.cpp
+    Object.cpp
+    ObjectFile.cpp
+    RecordStreamer.cpp
+    RelocationResolver.cpp
+    SymbolSize.cpp
+    SymbolicFile.cpp
+    TapiFile.cpp
+    TapiUniversal.cpp
+    WasmObjectFile.cpp
+    WindowsMachineFlag.cpp
+    WindowsResource.cpp
+    XCOFFObjectFile.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ObjectYAML/ya.make b/contrib/libs/llvm12/lib/ObjectYAML/ya.make
new file mode 100644
index 0000000000..6e82a57d8a
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ObjectYAML/ya.make
@@ -0,0 +1,51 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ObjectYAML
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ArchiveEmitter.cpp
+    ArchiveYAML.cpp
+    COFFEmitter.cpp
+    COFFYAML.cpp
+    CodeViewYAMLDebugSections.cpp
+    CodeViewYAMLSymbols.cpp
+    CodeViewYAMLTypeHashing.cpp
+    CodeViewYAMLTypes.cpp
+    DWARFEmitter.cpp
+    DWARFYAML.cpp
+    ELFEmitter.cpp
+    ELFYAML.cpp
+    MachOEmitter.cpp
+    MachOYAML.cpp
+    MinidumpEmitter.cpp
+    MinidumpYAML.cpp
+    ObjectYAML.cpp
+    WasmEmitter.cpp
+    WasmYAML.cpp
+    XCOFFYAML.cpp
+    YAML.cpp
+    yaml2obj.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Option/ya.make b/contrib/libs/llvm12/lib/Option/ya.make
new file mode 100644
index 0000000000..03e62a33bc
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Option/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Option
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Arg.cpp
+    ArgList.cpp
+    OptTable.cpp
+    Option.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Passes/ya.make b/contrib/libs/llvm12/lib/Passes/ya.make
new file mode 100644
index 0000000000..5807c7c7ba
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Passes/ya.make
@@ -0,0 +1,42 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Passes
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PassBuilder.cpp
+    PassPlugin.cpp
+    StandardInstrumentations.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make b/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make
new file mode 100644
index 0000000000..79b7fca0ce
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ProfileData/Coverage
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CoverageMapping.cpp
+    CoverageMappingReader.cpp
+    CoverageMappingWriter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ProfileData/ya.make b/contrib/libs/llvm12/lib/ProfileData/ya.make
new file mode 100644
index 0000000000..214322a5d4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ProfileData/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/ProfileData
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    GCOV.cpp
+    InstrProf.cpp
+    InstrProfReader.cpp
+    InstrProfWriter.cpp
+    ProfileSummaryBuilder.cpp
+    SampleProf.cpp
+    SampleProfReader.cpp
+    SampleProfWriter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Remarks/ya.make b/contrib/libs/llvm12/lib/Remarks/ya.make
new file mode 100644
index 0000000000..9c92b75a37
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Remarks/ya.make
@@ -0,0 +1,37 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Remarks
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BitstreamRemarkParser.cpp
+    BitstreamRemarkSerializer.cpp
+    Remark.cpp
+    RemarkFormat.cpp
+    RemarkLinker.cpp
+    RemarkParser.cpp
+    RemarkSerializer.cpp
+    RemarkStreamer.cpp
+    RemarkStringTable.cpp
+    YAMLRemarkParser.cpp
+    YAMLRemarkSerializer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Support/ya.make b/contrib/libs/llvm12/lib/Support/ya.make
new file mode 100644
index 0000000000..392a6f8c65
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Support/ya.make
@@ -0,0 +1,170 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    BSD-2-Clause AND
+    BSD-3-Clause AND
+    ISC AND
+    NCSA AND
+    Public-Domain AND
+    Spencer-94 AND
+    Unicode-Mappings
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/zlib
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Support
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64TargetParser.cpp
+    ABIBreak.cpp
+    AMDGPUMetadata.cpp
+    APFixedPoint.cpp
+    APFloat.cpp
+    APInt.cpp
+    APSInt.cpp
+    ARMAttributeParser.cpp
+    ARMBuildAttrs.cpp
+    ARMTargetParser.cpp
+    ARMWinEH.cpp
+    Allocator.cpp
+    Atomic.cpp
+    BinaryStreamError.cpp
+    BinaryStreamReader.cpp
+    BinaryStreamRef.cpp
+    BinaryStreamWriter.cpp
+    BlockFrequency.cpp
+    BranchProbability.cpp
+    BuryPointer.cpp
+    COM.cpp
+    CRC.cpp
+    CachePruning.cpp
+    Chrono.cpp
+    CodeGenCoverage.cpp
+    CommandLine.cpp
+    Compression.cpp
+    ConvertUTF.cpp
+    ConvertUTFWrapper.cpp
+    CrashRecoveryContext.cpp
+    DAGDeltaAlgorithm.cpp
+    DJB.cpp
+    DataExtractor.cpp
+    Debug.cpp
+    DebugCounter.cpp
+    DeltaAlgorithm.cpp
+    DynamicLibrary.cpp
+    ELFAttributeParser.cpp
+    ELFAttributes.cpp
+    Errno.cpp
+    Error.cpp
+    ErrorHandling.cpp
+    ExtensibleRTTI.cpp
+    FileCollector.cpp
+    FileOutputBuffer.cpp
+    FileUtilities.cpp
+    FoldingSet.cpp
+    FormatVariadic.cpp
+    FormattedStream.cpp
+    GlobPattern.cpp
+    GraphWriter.cpp
+    Hashing.cpp
+    Host.cpp
+    InitLLVM.cpp
+    InstructionCost.cpp
+    IntEqClasses.cpp
+    IntervalMap.cpp
+    ItaniumManglingCanonicalizer.cpp
+    JSON.cpp
+    KnownBits.cpp
+    LEB128.cpp
+    LineIterator.cpp
+    Locale.cpp
+    LockFileManager.cpp
+    LowLevelType.cpp
+    MD5.cpp
+    ManagedStatic.cpp
+    MathExtras.cpp
+    MemAlloc.cpp
+    Memory.cpp
+    MemoryBuffer.cpp
+    MemoryBufferRef.cpp
+    NativeFormatting.cpp
+    OptimizedStructLayout.cpp
+    Optional.cpp
+    Parallel.cpp
+    Path.cpp
+    PluginLoader.cpp
+    PrettyStackTrace.cpp
+    Process.cpp
+    Program.cpp
+    RISCVAttributeParser.cpp
+    RISCVAttributes.cpp
+    RWMutex.cpp
+    RandomNumberGenerator.cpp
+    Regex.cpp
+    SHA1.cpp
+    ScaledNumber.cpp
+    ScopedPrinter.cpp
+    Signals.cpp
+    Signposts.cpp
+    SmallPtrSet.cpp
+    SmallVector.cpp
+    SourceMgr.cpp
+    SpecialCaseList.cpp
+    Statistic.cpp
+    StringExtras.cpp
+    StringMap.cpp
+    StringRef.cpp
+    StringSaver.cpp
+    SuffixTree.cpp
+    SymbolRemappingReader.cpp
+    SystemUtils.cpp
+    TarWriter.cpp
+    TargetParser.cpp
+    TargetRegistry.cpp
+    ThreadLocal.cpp
+    ThreadPool.cpp
+    Threading.cpp
+    TimeProfiler.cpp
+    Timer.cpp
+    ToolOutputFile.cpp
+    TrigramIndex.cpp
+    Triple.cpp
+    Twine.cpp
+    Unicode.cpp
+    UnicodeCaseFold.cpp
+    Valgrind.cpp
+    VersionTuple.cpp
+    VirtualFileSystem.cpp
+    Watchdog.cpp
+    WithColor.cpp
+    X86TargetParser.cpp
+    YAMLParser.cpp
+    YAMLTraits.cpp
+    Z3Solver.cpp
+    circular_raw_ostream.cpp
+    raw_os_ostream.cpp
+    raw_ostream.cpp
+    regcomp.c
+    regerror.c
+    regexec.c
+    regfree.c
+    regstrlcpy.c
+    xxhash.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/TableGen/ya.make b/contrib/libs/llvm12/lib/TableGen/ya.make
new file mode 100644
index 0000000000..0706f79175
--- /dev/null
+++ b/contrib/libs/llvm12/lib/TableGen/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/TableGen
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DetailedRecordsBackend.cpp
+    Error.cpp
+    JSONBackend.cpp
+    Main.cpp
+    Record.cpp
+    SetTheory.cpp
+    StringMatcher.cpp
+    TGLexer.cpp
+    TGParser.cpp
+    TableGenBackend.cpp
+    TableGenBackendSkeleton.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make
new file mode 100644
index 0000000000..d429e6cc2d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make
@@ -0,0 +1,34 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64AsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make
new file mode 100644
index 0000000000..4e974e80be
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64Disassembler.cpp
+    AArch64ExternalSymbolizer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..7fd20ed031
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make
@@ -0,0 +1,44 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64AsmBackend.cpp
+    AArch64ELFObjectWriter.cpp
+    AArch64ELFStreamer.cpp
+    AArch64InstPrinter.cpp
+    AArch64MCAsmInfo.cpp
+    AArch64MCCodeEmitter.cpp
+    AArch64MCExpr.cpp
+    AArch64MCTargetDesc.cpp
+    AArch64MachObjectWriter.cpp
+    AArch64TargetStreamer.cpp
+    AArch64WinCOFFObjectWriter.cpp
+    AArch64WinCOFFStreamer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make
new file mode 100644
index 0000000000..997595760d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64TargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make
new file mode 100644
index 0000000000..e7faa2c7ae
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64BaseInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/ya.make
new file mode 100644
index 0000000000..7976bbaba0
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/AArch64/ya.make
@@ -0,0 +1,93 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AArch64A53Fix835769.cpp
+    AArch64A57FPLoadBalancing.cpp
+    AArch64AdvSIMDScalarPass.cpp
+    AArch64AsmPrinter.cpp
+    AArch64BranchTargets.cpp
+    AArch64CallingConvention.cpp
+    AArch64CleanupLocalDynamicTLSPass.cpp
+    AArch64CollectLOH.cpp
+    AArch64CompressJumpTables.cpp
+    AArch64CondBrTuning.cpp
+    AArch64ConditionOptimizer.cpp
+    AArch64ConditionalCompares.cpp
+    AArch64DeadRegisterDefinitionsPass.cpp
+    AArch64ExpandImm.cpp
+    AArch64ExpandPseudoInsts.cpp
+    AArch64FalkorHWPFFix.cpp
+    AArch64FastISel.cpp
+    AArch64FrameLowering.cpp
+    AArch64ISelDAGToDAG.cpp
+    AArch64ISelLowering.cpp
+    AArch64InstrInfo.cpp
+    AArch64LoadStoreOptimizer.cpp
+    AArch64MCInstLower.cpp
+    AArch64MachineFunctionInfo.cpp
+    AArch64MacroFusion.cpp
+    AArch64PBQPRegAlloc.cpp
+    AArch64PromoteConstant.cpp
+    AArch64RedundantCopyElimination.cpp
+    AArch64RegisterInfo.cpp
+    AArch64SIMDInstrOpt.cpp
+    AArch64SLSHardening.cpp
+    AArch64SelectionDAGInfo.cpp
+    AArch64SpeculationHardening.cpp
+    AArch64StackTagging.cpp
+    AArch64StackTaggingPreRA.cpp
+    AArch64StorePairSuppress.cpp
+    AArch64Subtarget.cpp
+    AArch64TargetMachine.cpp
+    AArch64TargetObjectFile.cpp
+    AArch64TargetTransformInfo.cpp
+    GISel/AArch64CallLowering.cpp
+    GISel/AArch64InstructionSelector.cpp
+    GISel/AArch64LegalizerInfo.cpp
+    GISel/AArch64PostLegalizerCombiner.cpp
+    GISel/AArch64PostLegalizerLowering.cpp
+    GISel/AArch64PostSelectOptimize.cpp
+    GISel/AArch64PreLegalizerCombiner.cpp
+    GISel/AArch64RegisterBankInfo.cpp
+    SVEIntrinsicOpts.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make
new file mode 100644
index 0000000000..d0f1526a26
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make
@@ -0,0 +1,34 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMAsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make
new file mode 100644
index 0000000000..b8abfb8e5a
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMDisassembler.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..8b14ce95d7
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make
@@ -0,0 +1,47 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMAsmBackend.cpp
+    ARMELFObjectWriter.cpp
+    ARMELFStreamer.cpp
+    ARMInstPrinter.cpp
+    ARMMCAsmInfo.cpp
+    ARMMCCodeEmitter.cpp
+    ARMMCExpr.cpp
+    ARMMCTargetDesc.cpp
+    ARMMachORelocationInfo.cpp
+    ARMMachObjectWriter.cpp
+    ARMTargetStreamer.cpp
+    ARMUnwindOpAsm.cpp
+    ARMWinCOFFObjectWriter.cpp
+    ARMWinCOFFStreamer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make
new file mode 100644
index 0000000000..e34301900f
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMTargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make b/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make
new file mode 100644
index 0000000000..3d6ae66557
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMBaseInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/ya.make b/contrib/libs/llvm12/lib/Target/ARM/ya.make
new file mode 100644
index 0000000000..c8aa734a5e
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ARM/ya.make
@@ -0,0 +1,86 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    A15SDOptimizer.cpp
+    ARMAsmPrinter.cpp
+    ARMBaseInstrInfo.cpp
+    ARMBaseRegisterInfo.cpp
+    ARMBasicBlockInfo.cpp
+    ARMBlockPlacement.cpp
+    ARMCallLowering.cpp
+    ARMCallingConv.cpp
+    ARMConstantIslandPass.cpp
+    ARMConstantPoolValue.cpp
+    ARMExpandPseudoInsts.cpp
+    ARMFastISel.cpp
+    ARMFrameLowering.cpp
+    ARMHazardRecognizer.cpp
+    ARMISelDAGToDAG.cpp
+    ARMISelLowering.cpp
+    ARMInstrInfo.cpp
+    ARMInstructionSelector.cpp
+    ARMLegalizerInfo.cpp
+    ARMLoadStoreOptimizer.cpp
+    ARMLowOverheadLoops.cpp
+    ARMMCInstLower.cpp
+    ARMMachineFunctionInfo.cpp
+    ARMMacroFusion.cpp
+    ARMOptimizeBarriersPass.cpp
+    ARMParallelDSP.cpp
+    ARMRegisterBankInfo.cpp
+    ARMRegisterInfo.cpp
+    ARMSLSHardening.cpp
+    ARMSelectionDAGInfo.cpp
+    ARMSubtarget.cpp
+    ARMTargetMachine.cpp
+    ARMTargetObjectFile.cpp
+    ARMTargetTransformInfo.cpp
+    MLxExpansionPass.cpp
+    MVEGatherScatterLowering.cpp
+    MVETailPredication.cpp
+    MVEVPTBlockPass.cpp
+    MVEVPTOptimisationsPass.cpp
+    Thumb1FrameLowering.cpp
+    Thumb1InstrInfo.cpp
+    Thumb2ITBlockPass.cpp
+    Thumb2InstrInfo.cpp
+    Thumb2SizeReduction.cpp
+    ThumbRegisterInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make
new file mode 100644
index 0000000000..dd505ffdf4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BPFAsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make
new file mode 100644
index 0000000000..5e13015fe2
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BPFDisassembler.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..aeaae3584b
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BPFAsmBackend.cpp
+    BPFELFObjectWriter.cpp
+    BPFInstPrinter.cpp
+    BPFMCCodeEmitter.cpp
+    BPFMCTargetDesc.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make
new file mode 100644
index 0000000000..24ecc1800a
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BPFTargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/ya.make b/contrib/libs/llvm12/lib/Target/BPF/ya.make
new file mode 100644
index 0000000000..f422f0f43b
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/BPF/ya.make
@@ -0,0 +1,57 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BPFAbstractMemberAccess.cpp
+    BPFAdjustOpt.cpp
+    BPFAsmPrinter.cpp
+    BPFCheckAndAdjustIR.cpp
+    BPFFrameLowering.cpp
+    BPFISelDAGToDAG.cpp
+    BPFISelLowering.cpp
+    BPFInstrInfo.cpp
+    BPFMCInstLower.cpp
+    BPFMIChecking.cpp
+    BPFMIPeephole.cpp
+    BPFMISimplifyPatchable.cpp
+    BPFPreserveDIType.cpp
+    BPFRegisterInfo.cpp
+    BPFSelectionDAGInfo.cpp
+    BPFSubtarget.cpp
+    BPFTargetMachine.cpp
+    BTFDebug.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..049c5b71d3
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make
@@ -0,0 +1,34 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    NVPTXInstPrinter.cpp
+    NVPTXMCAsmInfo.cpp
+    NVPTXMCTargetDesc.cpp
+    NVPTXTargetStreamer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make
new file mode 100644
index 0000000000..167710971a
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    NVPTXTargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/ya.make
new file mode 100644
index 0000000000..b86455f3f0
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/NVPTX/ya.make
@@ -0,0 +1,64 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    NVPTXAllocaHoisting.cpp
+    NVPTXAsmPrinter.cpp
+    NVPTXAssignValidGlobalNames.cpp
+    NVPTXFrameLowering.cpp
+    NVPTXGenericToNVVM.cpp
+    NVPTXISelDAGToDAG.cpp
+    NVPTXISelLowering.cpp
+    NVPTXImageOptimizer.cpp
+    NVPTXInstrInfo.cpp
+    NVPTXLowerAggrCopies.cpp
+    NVPTXLowerAlloca.cpp
+    NVPTXLowerArgs.cpp
+    NVPTXMCExpr.cpp
+    NVPTXPeephole.cpp
+    NVPTXPrologEpilogPass.cpp
+    NVPTXProxyRegErasure.cpp
+    NVPTXRegisterInfo.cpp
+    NVPTXReplaceImageHandles.cpp
+    NVPTXSubtarget.cpp
+    NVPTXTargetMachine.cpp
+    NVPTXTargetTransformInfo.cpp
+    NVPTXUtilities.cpp
+    NVVMIntrRange.cpp
+    NVVMReflect.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make
new file mode 100644
index 0000000000..b090474c9d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PPCAsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make
new file mode 100644
index 0000000000..3e4f91f2e8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PPCDisassembler.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..c01e8f2278
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make
@@ -0,0 +1,44 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PPCAsmBackend.cpp
+    PPCELFObjectWriter.cpp
+    PPCELFStreamer.cpp
+    PPCInstPrinter.cpp
+    PPCMCAsmInfo.cpp
+    PPCMCCodeEmitter.cpp
+    PPCMCExpr.cpp
+    PPCMCTargetDesc.cpp
+    PPCPredicates.cpp
+    PPCXCOFFObjectWriter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make
new file mode 100644
index 0000000000..08615c47e8
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PowerPCTargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/ya.make
new file mode 100644
index 0000000000..36860097e2
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/PowerPC/ya.make
@@ -0,0 +1,78 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    GISel/PPCCallLowering.cpp
+    GISel/PPCInstructionSelector.cpp
+    GISel/PPCLegalizerInfo.cpp
+    GISel/PPCRegisterBankInfo.cpp
+    PPCAsmPrinter.cpp
+    PPCBoolRetToInt.cpp
+    PPCBranchCoalescing.cpp
+    PPCBranchSelector.cpp
+    PPCCCState.cpp
+    PPCCTRLoops.cpp
+    PPCCallingConv.cpp
+    PPCEarlyReturn.cpp
+    PPCExpandISEL.cpp
+    PPCFastISel.cpp
+    PPCFrameLowering.cpp
+    PPCHazardRecognizers.cpp
+    PPCISelDAGToDAG.cpp
+    PPCISelLowering.cpp
+    PPCInstrInfo.cpp
+    PPCLoopInstrFormPrep.cpp
+    PPCLowerMASSVEntries.cpp
+    PPCMCInstLower.cpp
+    PPCMIPeephole.cpp
+    PPCMachineFunctionInfo.cpp
+    PPCMachineScheduler.cpp
+    PPCMacroFusion.cpp
+    PPCPreEmitPeephole.cpp
+    PPCReduceCRLogicals.cpp
+    PPCRegisterInfo.cpp
+    PPCSubtarget.cpp
+    PPCTLSDynamicCall.cpp
+    PPCTOCRegDeps.cpp
+    PPCTargetMachine.cpp
+    PPCTargetObjectFile.cpp
+    PPCTargetTransformInfo.cpp
+    PPCVSXCopy.cpp
+    PPCVSXFMAMutate.cpp
+    PPCVSXSwapRemoval.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make
new file mode 100644
index 0000000000..7021bc60ed
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    X86AsmParser.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make
new file mode 100644
index 0000000000..4b11c2a2fa
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    X86Disassembler.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make
new file mode 100644
index 0000000000..9c87094d22
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make
@@ -0,0 +1,46 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    X86ATTInstPrinter.cpp
+    X86AsmBackend.cpp
+    X86ELFObjectWriter.cpp
+    X86InstComments.cpp
+    X86InstPrinterCommon.cpp
+    X86IntelInstPrinter.cpp
+    X86MCAsmInfo.cpp
+    X86MCCodeEmitter.cpp
+    X86MCTargetDesc.cpp
+    X86MachObjectWriter.cpp
+    X86ShuffleDecode.cpp
+    X86WinCOFFObjectWriter.cpp
+    X86WinCOFFStreamer.cpp
+    X86WinCOFFTargetStreamer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make
new file mode 100644
index 0000000000..acfe9ed6ef
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    X86TargetInfo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/ya.make b/contrib/libs/llvm12/lib/Target/X86/ya.make
new file mode 100644
index 0000000000..43c016bce4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/X86/ya.make
@@ -0,0 +1,99 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86
+)
+
+NO_CLANG_COVERAGE()
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    X86AsmPrinter.cpp
+    X86AvoidStoreForwardingBlocks.cpp
+    X86AvoidTrailingCall.cpp
+    X86CallFrameOptimization.cpp
+    X86CallLowering.cpp
+    X86CallingConv.cpp
+    X86CmovConversion.cpp
+    X86DiscriminateMemOps.cpp
+    X86DomainReassignment.cpp
+    X86EvexToVex.cpp
+    X86ExpandPseudo.cpp
+    X86FastISel.cpp
+    X86FixupBWInsts.cpp
+    X86FixupLEAs.cpp
+    X86FixupSetCC.cpp
+    X86FlagsCopyLowering.cpp
+    X86FloatingPoint.cpp
+    X86FrameLowering.cpp
+    X86ISelDAGToDAG.cpp
+    X86ISelLowering.cpp
+    X86IndirectBranchTracking.cpp
+    X86IndirectThunks.cpp
+    X86InsertPrefetch.cpp
+    X86InsertWait.cpp
+    X86InstCombineIntrinsic.cpp
+    X86InstrFMA3Info.cpp
+    X86InstrFoldTables.cpp
+    X86InstrInfo.cpp
+    X86InstructionSelector.cpp
+    X86InterleavedAccess.cpp
+    X86LegalizerInfo.cpp
+    X86LoadValueInjectionLoadHardening.cpp
+    X86LoadValueInjectionRetHardening.cpp
+    X86LowerAMXType.cpp
+    X86MCInstLower.cpp
+    X86MachineFunctionInfo.cpp
+    X86MacroFusion.cpp
+    X86OptimizeLEAs.cpp
+    X86PadShortFunction.cpp
+    X86PartialReduction.cpp
+    X86PreTileConfig.cpp
+    X86RegisterBankInfo.cpp
+    X86RegisterInfo.cpp
+    X86SelectionDAGInfo.cpp
+    X86ShuffleDecodeConstantPool.cpp
+    X86SpeculativeExecutionSideEffectSuppression.cpp
+    X86SpeculativeLoadHardening.cpp
+    X86Subtarget.cpp
+    X86TargetMachine.cpp
+    X86TargetObjectFile.cpp
+    X86TargetTransformInfo.cpp
+    X86TileConfig.cpp
+    X86VZeroUpper.cpp
+    X86WinAllocaExpander.cpp
+    X86WinEHState.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Target/ya.make b/contrib/libs/llvm12/lib/Target/ya.make
new file mode 100644
index 0000000000..73e90f4b10
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Target/ya.make
@@ -0,0 +1,34 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Target
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Target.cpp
+    TargetIntrinsicInfo.cpp
+    TargetLoweringObjectFile.cpp
+    TargetMachine.cpp
+    TargetMachineC.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make b/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make
new file mode 100644
index 0000000000..9fedb228b4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/TextAPI
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Architecture.cpp
+    ArchitectureSet.cpp
+    InterfaceFile.cpp
+    PackedVersion.cpp
+    Platform.cpp
+    Symbol.cpp
+    Target.cpp
+    TextStub.cpp
+    TextStubCommon.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make b/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make
new file mode 100644
index 0000000000..e26b1db3c9
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make
@@ -0,0 +1,30 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool
+    contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DlltoolDriver.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make b/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make
new file mode 100644
index 0000000000..c5b2d4e0bd
--- /dev/null
+++ b/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib
+    contrib/libs/llvm12/lib/ToolDrivers/llvm-lib
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    LibDriver.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make b/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make
new file mode 100644
index 0000000000..723b5a2955
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AggressiveInstCombine.cpp
+    TruncInstCombine.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make b/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make
new file mode 100644
index 0000000000..82a33dfab1
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CFGuard.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Coroutines/ya.make b/contrib/libs/llvm12/lib/Transforms/Coroutines/ya.make
new file mode 100644
index 0000000000..f19e4e9eb0
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/Coroutines/ya.make
@@ -0,0 +1,37 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CoroCleanup.cpp
+    CoroEarly.cpp
+    CoroElide.cpp
+    CoroFrame.cpp
+    CoroSplit.cpp
+    Coroutines.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/HelloNew/ya.make b/contrib/libs/llvm12/lib/Transforms/HelloNew/ya.make
new file mode 100644
index 0000000000..bfafb029d3
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/HelloNew/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    HelloWorld.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/IPO/ya.make b/contrib/libs/llvm12/lib/Transforms/IPO/ya.make
new file mode 100644
index 0000000000..41f92d67a4
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/IPO/ya.make
@@ -0,0 +1,83 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/IPO
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AlwaysInliner.cpp
+    Annotation2Metadata.cpp
+    ArgumentPromotion.cpp
+    Attributor.cpp
+    AttributorAttributes.cpp
+    BarrierNoopPass.cpp
+    BlockExtractor.cpp
+    CalledValuePropagation.cpp
+    ConstantMerge.cpp
+    CrossDSOCFI.cpp
+    DeadArgumentElimination.cpp
+    ElimAvailExtern.cpp
+    ExtractGV.cpp
+    ForceFunctionAttrs.cpp
+    FunctionAttrs.cpp
+    FunctionImport.cpp
+    GlobalDCE.cpp
+    GlobalOpt.cpp
+    GlobalSplit.cpp
+    HotColdSplitting.cpp
+    IPO.cpp
+    IROutliner.cpp
+    InferFunctionAttrs.cpp
+    InlineSimple.cpp
+    Inliner.cpp
+    Internalize.cpp
+    LoopExtractor.cpp
+    LowerTypeTests.cpp
+    MergeFunctions.cpp
+    OpenMPOpt.cpp
+    PartialInlining.cpp
+    PassManagerBuilder.cpp
+    PruneEH.cpp
+    SCCP.cpp
+    SampleContextTracker.cpp
+    SampleProfile.cpp
+    SampleProfileProbe.cpp
+    StripDeadPrototypes.cpp
+    StripSymbols.cpp
+    SyntheticCountsPropagation.cpp
+    ThinLTOBitcodeWriter.cpp
+    WholeProgramDevirt.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make b/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make
new file mode 100644
index 0000000000..eeda0b4bd6
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make
@@ -0,0 +1,44 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    InstCombineAddSub.cpp
+    InstCombineAndOrXor.cpp
+    InstCombineAtomicRMW.cpp
+    InstCombineCalls.cpp
+    InstCombineCasts.cpp
+    InstCombineCompares.cpp
+    InstCombineLoadStoreAlloca.cpp
+    InstCombineMulDivRem.cpp
+    InstCombineNegator.cpp
+    InstCombinePHI.cpp
+    InstCombineSelect.cpp
+    InstCombineShifts.cpp
+    InstCombineSimplifyDemanded.cpp
+    InstCombineVectorOps.cpp
+    InstructionCombining.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make b/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make
new file mode 100644
index 0000000000..5b8d25019d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make
@@ -0,0 +1,53 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AddressSanitizer.cpp
+    BoundsChecking.cpp
+    CGProfile.cpp
+    ControlHeightReduction.cpp
+    DataFlowSanitizer.cpp
+    GCOVProfiling.cpp
+    HWAddressSanitizer.cpp
+    IndirectCallPromotion.cpp
+    InstrOrderFile.cpp
+    InstrProfiling.cpp
+    Instrumentation.cpp
+    MemProfiler.cpp
+    MemorySanitizer.cpp
+    PGOInstrumentation.cpp
+    PGOMemOPSizeOpt.cpp
+    PoisonChecking.cpp
+    SanitizerCoverage.cpp
+    ThreadSanitizer.cpp
+    ValueProfileCollector.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make b/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make
new file mode 100644
index 0000000000..84bc394362
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DependencyAnalysis.cpp
+    ObjCARC.cpp
+    ObjCARCAPElim.cpp
+    ObjCARCContract.cpp
+    ObjCARCExpand.cpp
+    ObjCARCOpts.cpp
+    ProvenanceAnalysis.cpp
+    ProvenanceAnalysisEvaluator.cpp
+    PtrState.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make b/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make
new file mode 100644
index 0000000000..4d412213aa
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make
@@ -0,0 +1,109 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/Scalar
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ADCE.cpp
+    AlignmentFromAssumptions.cpp
+    AnnotationRemarks.cpp
+    BDCE.cpp
+    CallSiteSplitting.cpp
+    ConstantHoisting.cpp
+    ConstraintElimination.cpp
+    CorrelatedValuePropagation.cpp
+    DCE.cpp
+    DeadStoreElimination.cpp
+    DivRemPairs.cpp
+    EarlyCSE.cpp
+    FlattenCFGPass.cpp
+    Float2Int.cpp
+    GVN.cpp
+    GVNHoist.cpp
+    GVNSink.cpp
+    GuardWidening.cpp
+    IVUsersPrinter.cpp
+    IndVarSimplify.cpp
+    InductiveRangeCheckElimination.cpp
+    InferAddressSpaces.cpp
+    InstSimplifyPass.cpp
+    JumpThreading.cpp
+    LICM.cpp
+    LoopAccessAnalysisPrinter.cpp
+    LoopDataPrefetch.cpp
+    LoopDeletion.cpp
+    LoopDistribute.cpp
+    LoopFlatten.cpp
+    LoopFuse.cpp
+    LoopIdiomRecognize.cpp
+    LoopInstSimplify.cpp
+    LoopInterchange.cpp
+    LoopLoadElimination.cpp
+    LoopPassManager.cpp
+    LoopPredication.cpp
+    LoopRerollPass.cpp
+    LoopRotation.cpp
+    LoopSimplifyCFG.cpp
+    LoopSink.cpp
+    LoopStrengthReduce.cpp
+    LoopUnrollAndJamPass.cpp
+    LoopUnrollPass.cpp
+    LoopUnswitch.cpp
+    LoopVersioningLICM.cpp
+    LowerAtomic.cpp
+    LowerConstantIntrinsics.cpp
+    LowerExpectIntrinsic.cpp
+    LowerGuardIntrinsic.cpp
+    LowerMatrixIntrinsics.cpp
+    LowerWidenableCondition.cpp
+    MakeGuardsExplicit.cpp
+    MemCpyOptimizer.cpp
+    MergeICmps.cpp
+    MergedLoadStoreMotion.cpp
+    NaryReassociate.cpp
+    NewGVN.cpp
+    PartiallyInlineLibCalls.cpp
+    PlaceSafepoints.cpp
+    Reassociate.cpp
+    Reg2Mem.cpp
+    RewriteStatepointsForGC.cpp
+    SCCP.cpp
+    SROA.cpp
+    Scalar.cpp
+    ScalarizeMaskedMemIntrin.cpp
+    Scalarizer.cpp
+    SeparateConstOffsetFromGEP.cpp
+    SimpleLoopUnswitch.cpp
+    SimplifyCFGPass.cpp
+    Sink.cpp
+    SpeculateAroundPHIs.cpp
+    SpeculativeExecution.cpp
+    StraightLineStrengthReduce.cpp
+    StructurizeCFG.cpp
+    TailRecursionElimination.cpp
+    WarnMissedTransforms.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Utils/ya.make b/contrib/libs/llvm12/lib/Transforms/Utils/ya.make
new file mode 100644
index 0000000000..07debc572d
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/Utils/ya.make
@@ -0,0 +1,99 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AMDGPUEmitPrintf.cpp
+    ASanStackFrameLayout.cpp
+    AddDiscriminators.cpp
+    AssumeBundleBuilder.cpp
+    BasicBlockUtils.cpp
+    BreakCriticalEdges.cpp
+    BuildLibCalls.cpp
+    BypassSlowDivision.cpp
+    CallGraphUpdater.cpp
+    CallPromotionUtils.cpp
+    CanonicalizeAliases.cpp
+    CanonicalizeFreezeInLoops.cpp
+    CloneFunction.cpp
+    CloneModule.cpp
+    CodeExtractor.cpp
+    CodeMoverUtils.cpp
+    CtorUtils.cpp
+    Debugify.cpp
+    DemoteRegToStack.cpp
+    EntryExitInstrumenter.cpp
+    EscapeEnumerator.cpp
+    Evaluator.cpp
+    FixIrreducible.cpp
+    FlattenCFG.cpp
+    FunctionComparator.cpp
+    FunctionImportUtils.cpp
+    GlobalStatus.cpp
+    GuardUtils.cpp
+    InjectTLIMappings.cpp
+    InlineFunction.cpp
+    InstructionNamer.cpp
+    IntegerDivision.cpp
+    LCSSA.cpp
+    LibCallsShrinkWrap.cpp
+    Local.cpp
+    LoopPeel.cpp
+    LoopRotationUtils.cpp
+    LoopSimplify.cpp
+    LoopUnroll.cpp
+    LoopUnrollAndJam.cpp
+    LoopUnrollRuntime.cpp
+    LoopUtils.cpp
+    LoopVersioning.cpp
+    LowerInvoke.cpp
+    LowerMemIntrinsics.cpp
+    LowerSwitch.cpp
+    MatrixUtils.cpp
+    Mem2Reg.cpp
+    MetaRenamer.cpp
+    ModuleUtils.cpp
+    NameAnonGlobals.cpp
+    PredicateInfo.cpp
+    PromoteMemoryToRegister.cpp
+    SSAUpdater.cpp
+    SSAUpdaterBulk.cpp
+    SanitizerStats.cpp
+    ScalarEvolutionExpander.cpp
+    SimplifyCFG.cpp
+    SimplifyIndVar.cpp
+    SimplifyLibCalls.cpp
+    SizeOpts.cpp
+    SplitModule.cpp
+    StripGCRelocates.cpp
+    StripNonLineTableDebugInfo.cpp
+    SymbolRewriter.cpp
+    UnifyFunctionExitNodes.cpp
+    UnifyLoopExits.cpp
+    UniqueInternalLinkageNames.cpp
+    Utils.cpp
+    VNCoercion.cpp
+    ValueMapper.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make b/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make
new file mode 100644
index 0000000000..482aed8e02
--- /dev/null
+++ b/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make
@@ -0,0 +1,41 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    LoadStoreVectorizer.cpp
+    LoopVectorizationLegality.cpp
+    LoopVectorize.cpp
+    SLPVectorizer.cpp
+    VPlan.cpp
+    VPlanHCFGBuilder.cpp
+    VPlanPredicator.cpp
+    VPlanSLP.cpp
+    VPlanTransforms.cpp
+    VPlanVerifier.cpp
+    VectorCombine.cpp
+    Vectorize.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/WindowsManifest/ya.make b/contrib/libs/llvm12/lib/WindowsManifest/ya.make
new file mode 100644
index 0000000000..f4d8f67753
--- /dev/null
+++ b/contrib/libs/llvm12/lib/WindowsManifest/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/WindowsManifest
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    WindowsManifestMerger.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/lib/XRay/ya.make b/contrib/libs/llvm12/lib/XRay/ya.make
new file mode 100644
index 0000000000..a82a32f3df
--- /dev/null
+++ b/contrib/libs/llvm12/lib/XRay/ya.make
@@ -0,0 +1,40 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/lib/XRay
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BlockIndexer.cpp
+    BlockPrinter.cpp
+    BlockVerifier.cpp
+    FDRRecordProducer.cpp
+    FDRRecords.cpp
+    FDRTraceExpander.cpp
+    FDRTraceWriter.cpp
+    FileHeaderReader.cpp
+    InstrumentationMap.cpp
+    LogBuilderConsumer.cpp
+    Profile.cpp
+    RecordInitializer.cpp
+    RecordPrinter.cpp
+    Trace.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/bugpoint/ya.make b/contrib/libs/llvm12/tools/bugpoint/ya.make
new file mode 100644
index 0000000000..9281034915
--- /dev/null
+++ b/contrib/libs/llvm12/tools/bugpoint/ya.make
@@ -0,0 +1,100 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Extensions
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/bugpoint
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BugDriver.cpp
+    CrashDebugger.cpp
+    ExecutionDriver.cpp
+    ExtractFunction.cpp
+    FindBugs.cpp
+    Miscompilation.cpp
+    OptimizerDriver.cpp
+    ToolRunner.cpp
+    bugpoint.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/dsymutil/ya.make b/contrib/libs/llvm12/tools/dsymutil/ya.make
new file mode 100644
index 0000000000..3070abe859
--- /dev/null
+++ b/contrib/libs/llvm12/tools/dsymutil/ya.make
@@ -0,0 +1,98 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DWARFLinker
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil
+    contrib/libs/llvm12/tools/dsymutil
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BinaryHolder.cpp
+    CFBundle.cpp
+    DebugMap.cpp
+    DwarfLinkerForBinary.cpp
+    MachODebugMapParser.cpp
+    MachOUtils.cpp
+    Reproducer.cpp
+    SymbolMap.cpp
+    dsymutil.cpp
+)
+
+IF (OS_DARWIN)
+    LDFLAGS(
+        -framework
+        CoreFoundation
+    )
+ENDIF()
+
+END()
diff --git a/contrib/libs/llvm12/tools/gold/ya.make b/contrib/libs/llvm12/tools/gold/ya.make
new file mode 100644
index 0000000000..a6c4d8b7c3
--- /dev/null
+++ b/contrib/libs/llvm12/tools/gold/ya.make
@@ -0,0 +1,67 @@
+# Generated by devtools/yamaker.
+
+DLL(LLVMgold PREFIX "")
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    build/platform/binutils
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/LTO
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/Transforms/IPO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/gold
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+EXPORTS_SCRIPT(gold.exports)
+
+CFLAGS(
+    -I$BINUTILS_ROOT_RESOURCE_GLOBAL/include
+)
+
+SRCS(
+    gold-plugin.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llc/ya.make b/contrib/libs/llvm12/tools/llc/ya.make
new file mode 100644
index 0000000000..61e1ca2eee
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llc/ya.make
@@ -0,0 +1,86 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/MIRParser
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llc.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/lli/ChildTarget/ya.make b/contrib/libs/llvm12/tools/lli/ChildTarget/ya.make
new file mode 100644
index 0000000000..18e37e6059
--- /dev/null
+++ b/contrib/libs/llvm12/tools/lli/ChildTarget/ya.make
@@ -0,0 +1,61 @@
+# Generated by devtools/yamaker.
+
+PROGRAM(lli-child-target)
+
+WITHOUT_LICENSE_TEXTS()
+
+LICENSE(NCSA)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/JITLink
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/lli/ChildTarget
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ChildTarget.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/lli/ya.make b/contrib/libs/llvm12/tools/lli/ya.make
new file mode 100644
index 0000000000..bf25061697
--- /dev/null
+++ b/contrib/libs/llvm12/tools/lli/ya.make
@@ -0,0 +1,83 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/Interpreter
+    contrib/libs/llvm12/lib/ExecutionEngine/JITLink
+    contrib/libs/llvm12/lib/ExecutionEngine/MCJIT
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+IF (OS_LINUX)
+    PEERDIR(
+        contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents
+    )
+ENDIF()
+
+ADDINCL(
+    contrib/libs/llvm12/tools/lli
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    lli.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-ar/ya.make b/contrib/libs/llvm12/tools/llvm-ar/ya.make
new file mode 100644
index 0000000000..8e26a9c57a
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-ar/ya.make
@@ -0,0 +1,59 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool
+    contrib/libs/llvm12/lib/ToolDrivers/llvm-lib
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-ar
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-ar.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-as/ya.make b/contrib/libs/llvm12/tools/llvm-as/ya.make
new file mode 100644
index 0000000000..c0acaeaf63
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-as/ya.make
@@ -0,0 +1,41 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-as
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-as.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-bcanalyzer/ya.make b/contrib/libs/llvm12/tools/llvm-bcanalyzer/ya.make
new file mode 100644
index 0000000000..6ae649468a
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-bcanalyzer/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-bcanalyzer
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-bcanalyzer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cat/ya.make b/contrib/libs/llvm12/tools/llvm-cat/ya.make
new file mode 100644
index 0000000000..9538ce6a36
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cat/ya.make
@@ -0,0 +1,42 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cat
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-cat.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cfi-verify/lib/ya.make b/contrib/libs/llvm12/tools/llvm-cfi-verify/lib/ya.make
new file mode 100644
index 0000000000..90c2ec6342
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cfi-verify/lib/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cfi-verify/lib
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    FileAnalysis.cpp
+    GraphBuilder.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cfi-verify/ya.make b/contrib/libs/llvm12/tools/llvm-cfi-verify/ya.make
new file mode 100644
index 0000000000..3259392f21
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cfi-verify/ya.make
@@ -0,0 +1,67 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/tools/llvm-cfi-verify/lib
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cfi-verify
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-cfi-verify.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-config/ya.make b/contrib/libs/llvm12/tools/llvm-config/ya.make
new file mode 100644
index 0000000000..bf7af728a9
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-config/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-config
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+CFLAGS(
+    -DCMAKE_CFG_INTDIR=\".\"
+)
+
+SRCS(
+    llvm-config.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cov/ya.make b/contrib/libs/llvm12/tools/llvm-cov/ya.make
new file mode 100644
index 0000000000..ace0179c7e
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cov/ya.make
@@ -0,0 +1,49 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/ProfileData/Coverage
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cov
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CodeCoverage.cpp
+    CoverageExporterJson.cpp
+    CoverageExporterLcov.cpp
+    CoverageFilters.cpp
+    CoverageReport.cpp
+    CoverageSummaryInfo.cpp
+    SourceCoverageView.cpp
+    SourceCoverageViewHTML.cpp
+    SourceCoverageViewText.cpp
+    TestingSupport.cpp
+    gcov.cpp
+    llvm-cov.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cvtres/ya.make b/contrib/libs/llvm12/tools/llvm-cvtres/ya.make
new file mode 100644
index 0000000000..3c1a10ed03
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cvtres/ya.make
@@ -0,0 +1,39 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres
+    contrib/libs/llvm12/tools/llvm-cvtres
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-cvtres.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cxxdump/ya.make b/contrib/libs/llvm12/tools/llvm-cxxdump/ya.make
new file mode 100644
index 0000000000..f500145cb4
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cxxdump/ya.make
@@ -0,0 +1,43 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cxxdump
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Error.cpp
+    llvm-cxxdump.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cxxfilt/ya.make b/contrib/libs/llvm12/tools/llvm-cxxfilt/ya.make
new file mode 100644
index 0000000000..252d94f1af
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cxxfilt/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cxxfilt
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-cxxfilt.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-cxxmap/ya.make b/contrib/libs/llvm12/tools/llvm-cxxmap/ya.make
new file mode 100644
index 0000000000..53384f4fe4
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-cxxmap/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-cxxmap
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-cxxmap.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-diff/ya.make b/contrib/libs/llvm12/tools/llvm-diff/ya.make
new file mode 100644
index 0000000000..6d52ad1ff9
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-diff/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-diff
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DiffConsumer.cpp
+    DiffLog.cpp
+    DifferenceEngine.cpp
+    llvm-diff.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-dis/ya.make b/contrib/libs/llvm12/tools/llvm-dis/ya.make
new file mode 100644
index 0000000000..a16c1173c7
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-dis/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-dis
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-dis.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-dwarfdump/ya.make b/contrib/libs/llvm12/tools/llvm-dwarfdump/ya.make
new file mode 100644
index 0000000000..555379398c
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-dwarfdump/ya.make
@@ -0,0 +1,54 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-dwarfdump
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    SectionSizes.cpp
+    Statistics.cpp
+    llvm-dwarfdump.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-dwp/ya.make b/contrib/libs/llvm12/tools/llvm-dwp/ya.make
new file mode 100644
index 0000000000..364a66f645
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-dwp/ya.make
@@ -0,0 +1,85 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-dwp
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    DWPError.cpp
+    llvm-dwp.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-elfabi/ya.make b/contrib/libs/llvm12/tools/llvm-elfabi/ya.make
new file mode 100644
index 0000000000..3247fce877
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-elfabi/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/InterfaceStub
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-elfabi
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ErrorCollector.cpp
+    llvm-elfabi.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-exegesis/lib/AArch64/ya.make b/contrib/libs/llvm12/tools/llvm-exegesis/lib/AArch64/ya.make
new file mode 100644
index 0000000000..3fd31cbdf8
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-exegesis/lib/AArch64/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/tools/llvm-exegesis/lib/AArch64
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Target.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-exegesis/lib/PowerPC/ya.make b/contrib/libs/llvm12/tools/llvm-exegesis/lib/PowerPC/ya.make
new file mode 100644
index 0000000000..a8bdbbeb65
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-exegesis/lib/PowerPC/ya.make
@@ -0,0 +1,28 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/tools/llvm-exegesis/lib/PowerPC
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Target.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-exegesis/lib/X86/ya.make b/contrib/libs/llvm12/tools/llvm-exegesis/lib/X86/ya.make
new file mode 100644
index 0000000000..3782826d15
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-exegesis/lib/X86/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/tools/llvm-exegesis/lib/X86
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Target.cpp
+    X86Counter.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-exegesis/lib/ya.make b/contrib/libs/llvm12/tools/llvm-exegesis/lib/ya.make
new file mode 100644
index 0000000000..8da6dc0a2e
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-exegesis/lib/ya.make
@@ -0,0 +1,46 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-exegesis/lib
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Analysis.cpp
+    Assembler.cpp
+    BenchmarkResult.cpp
+    BenchmarkRunner.cpp
+    Clustering.cpp
+    CodeTemplate.cpp
+    Error.cpp
+    LatencyBenchmarkRunner.cpp
+    LlvmState.cpp
+    MCInstrDescView.cpp
+    ParallelSnippetGenerator.cpp
+    PerfHelper.cpp
+    RegisterAliasing.cpp
+    RegisterValue.cpp
+    SchedClassResolution.cpp
+    SerialSnippetGenerator.cpp
+    SnippetFile.cpp
+    SnippetGenerator.cpp
+    SnippetRepetitor.cpp
+    Target.cpp
+    UopsBenchmarkRunner.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-exegesis/ya.make b/contrib/libs/llvm12/tools/llvm-exegesis/ya.make
new file mode 100644
index 0000000000..d66579b57f
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-exegesis/ya.make
@@ -0,0 +1,66 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/MCJIT
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ObjectYAML
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/tools/llvm-exegesis/lib
+    contrib/libs/llvm12/tools/llvm-exegesis/lib/X86
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-exegesis
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+CFLAGS(
+    -DLLVM_EXEGESIS_INITIALIZE_NATIVE_TARGET=InitializeX86ExegesisTarget
+)
+
+SRCS(
+    llvm-exegesis.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-extract/ya.make b/contrib/libs/llvm12/tools/llvm-extract/ya.make
new file mode 100644
index 0000000000..e7f08ddcf6
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-extract/ya.make
@@ -0,0 +1,51 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-extract
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-extract.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-gsymutil/ya.make b/contrib/libs/llvm12/tools/llvm-gsymutil/ya.make
new file mode 100644
index 0000000000..d85893ceba
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-gsymutil/ya.make
@@ -0,0 +1,90 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(NCSA)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/GSYM
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-gsymutil
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-gsymutil.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-ifs/ya.make b/contrib/libs/llvm12/tools/llvm-ifs/ya.make
new file mode 100644
index 0000000000..9c4a085d3b
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-ifs/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ObjectYAML
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-ifs
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-ifs.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-jitlink/llvm-jitlink-executor/ya.make b/contrib/libs/llvm12/tools/llvm-jitlink/llvm-jitlink-executor/ya.make
new file mode 100644
index 0000000000..b836b56139
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-jitlink/llvm-jitlink-executor/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-jitlink/llvm-jitlink-executor
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-jitlink-executor.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-jitlink/ya.make b/contrib/libs/llvm12/tools/llvm-jitlink/ya.make
new file mode 100644
index 0000000000..9ad221c089
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-jitlink/ya.make
@@ -0,0 +1,84 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/JITLink
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/Shared
+    contrib/libs/llvm12/lib/ExecutionEngine/Orc/TargetProcess
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-jitlink
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-jitlink-elf.cpp
+    llvm-jitlink-macho.cpp
+    llvm-jitlink.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-libtool-darwin/ya.make b/contrib/libs/llvm12/tools/llvm-libtool-darwin/ya.make
new file mode 100644
index 0000000000..f50c593678
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-libtool-darwin/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-libtool-darwin
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-libtool-darwin.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-link/ya.make b/contrib/libs/llvm12/tools/llvm-link/ya.make
new file mode 100644
index 0000000000..a4ebb486cf
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-link/ya.make
@@ -0,0 +1,51 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-link
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-link.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-lipo/ya.make b/contrib/libs/llvm12/tools/llvm-lipo/ya.make
new file mode 100644
index 0000000000..a210405684
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-lipo/ya.make
@@ -0,0 +1,69 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo
+    contrib/libs/llvm12/tools/llvm-lipo
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-lipo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-lto/ya.make b/contrib/libs/llvm12/tools/llvm-lto/ya.make
new file mode 100644
index 0000000000..a9bc947918
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-lto/ya.make
@@ -0,0 +1,92 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/LTO
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-lto
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-lto.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-lto2/ya.make b/contrib/libs/llvm12/tools/llvm-lto2/ya.make
new file mode 100644
index 0000000000..b4e797584a
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-lto2/ya.make
@@ -0,0 +1,92 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/LTO
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-lto2
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-lto2.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-mc/ya.make b/contrib/libs/llvm12/tools/llvm-mc/ya.make
new file mode 100644
index 0000000000..13a4e53f8c
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-mc/ya.make
@@ -0,0 +1,56 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-mc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Disassembler.cpp
+    llvm-mc.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-mca/ya.make b/contrib/libs/llvm12/tools/llvm-mca/ya.make
new file mode 100644
index 0000000000..bc6a92d7f8
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-mca/ya.make
@@ -0,0 +1,70 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/MCA
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-mca
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CodeRegion.cpp
+    CodeRegionGenerator.cpp
+    PipelinePrinter.cpp
+    Views/BottleneckAnalysis.cpp
+    Views/DispatchStatistics.cpp
+    Views/InstructionInfoView.cpp
+    Views/InstructionView.cpp
+    Views/RegisterFileStatistics.cpp
+    Views/ResourcePressureView.cpp
+    Views/RetireControlUnitStatistics.cpp
+    Views/SchedulerStatistics.cpp
+    Views/SummaryView.cpp
+    Views/TimelineView.cpp
+    Views/View.cpp
+    llvm-mca.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-ml/ya.make b/contrib/libs/llvm12/tools/llvm-ml/ya.make
new file mode 100644
index 0000000000..a84205697c
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-ml/ya.make
@@ -0,0 +1,59 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml
+    contrib/libs/llvm12/tools/llvm-ml
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Disassembler.cpp
+    llvm-ml.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-modextract/ya.make b/contrib/libs/llvm12/tools/llvm-modextract/ya.make
new file mode 100644
index 0000000000..055d56a41e
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-modextract/ya.make
@@ -0,0 +1,41 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-modextract
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-modextract.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-mt/ya.make b/contrib/libs/llvm12/tools/llvm-mt/ya.make
new file mode 100644
index 0000000000..44379be67d
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-mt/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/WindowsManifest
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt
+    contrib/libs/llvm12/tools/llvm-mt
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-mt.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-nm/ya.make b/contrib/libs/llvm12/tools/llvm-nm/ya.make
new file mode 100644
index 0000000000..39735659b0
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-nm/ya.make
@@ -0,0 +1,57 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-nm
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-nm.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-objcopy/ya.make b/contrib/libs/llvm12/tools/llvm-objcopy/ya.make
new file mode 100644
index 0000000000..829a92f837
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-objcopy/ya.make
@@ -0,0 +1,57 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy
+    contrib/libs/llvm12/tools/llvm-objcopy
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Buffer.cpp
+    COFF/COFFObjcopy.cpp
+    COFF/Object.cpp
+    COFF/Reader.cpp
+    COFF/Writer.cpp
+    CopyConfig.cpp
+    ELF/ELFConfig.cpp
+    ELF/ELFObjcopy.cpp
+    ELF/Object.cpp
+    MachO/MachOLayoutBuilder.cpp
+    MachO/MachOObjcopy.cpp
+    MachO/MachOReader.cpp
+    MachO/MachOWriter.cpp
+    MachO/Object.cpp
+    llvm-objcopy.cpp
+    wasm/Object.cpp
+    wasm/Reader.cpp
+    wasm/WasmObjcopy.cpp
+    wasm/Writer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-objdump/ya.make b/contrib/libs/llvm12/tools/llvm-objdump/ya.make
new file mode 100644
index 0000000000..9523258faa
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-objdump/ya.make
@@ -0,0 +1,73 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-objdump
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    COFFDump.cpp
+    ELFDump.cpp
+    MachODump.cpp
+    WasmDump.cpp
+    XCOFFDump.cpp
+    llvm-objdump.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-opt-report/ya.make b/contrib/libs/llvm12/tools/llvm-opt-report/ya.make
new file mode 100644
index 0000000000..876e72fbbc
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-opt-report/ya.make
@@ -0,0 +1,31 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-opt-report
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    OptReport.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-pdbutil/ya.make b/contrib/libs/llvm12/tools/llvm-pdbutil/ya.make
new file mode 100644
index 0000000000..77253c4715
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-pdbutil/ya.make
@@ -0,0 +1,62 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ObjectYAML
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-pdbutil
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    BytesOutputStyle.cpp
+    DumpOutputStyle.cpp
+    ExplainOutputStyle.cpp
+    FormatUtil.cpp
+    InputFile.cpp
+    LinePrinter.cpp
+    MinimalSymbolDumper.cpp
+    MinimalTypeDumper.cpp
+    PdbYaml.cpp
+    PrettyBuiltinDumper.cpp
+    PrettyClassDefinitionDumper.cpp
+    PrettyClassLayoutGraphicalDumper.cpp
+    PrettyCompilandDumper.cpp
+    PrettyEnumDumper.cpp
+    PrettyExternalSymbolDumper.cpp
+    PrettyFunctionDumper.cpp
+    PrettyTypeDumper.cpp
+    PrettyTypedefDumper.cpp
+    PrettyVariableDumper.cpp
+    StreamUtil.cpp
+    TypeReferenceTracker.cpp
+    YAMLOutputStyle.cpp
+    llvm-pdbutil.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-profdata/ya.make b/contrib/libs/llvm12/tools/llvm-profdata/ya.make
new file mode 100644
index 0000000000..3d81f5dd7f
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-profdata/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-profdata
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-profdata.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-profgen/ya.make b/contrib/libs/llvm12/tools/llvm-profgen/ya.make
new file mode 100644
index 0000000000..965924b3bc
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-profgen/ya.make
@@ -0,0 +1,67 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-profgen
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    PerfReader.cpp
+    ProfileGenerator.cpp
+    ProfiledBinary.cpp
+    PseudoProbe.cpp
+    llvm-profgen.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-rc/ya.make b/contrib/libs/llvm12/tools/llvm-rc/ya.make
new file mode 100644
index 0000000000..793fee0cb4
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-rc/ya.make
@@ -0,0 +1,35 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc
+    contrib/libs/llvm12/tools/llvm-rc
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ResourceFileWriter.cpp
+    ResourceScriptCppFilter.cpp
+    ResourceScriptParser.cpp
+    ResourceScriptStmt.cpp
+    ResourceScriptToken.cpp
+    llvm-rc.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-readobj/ya.make b/contrib/libs/llvm12/tools/llvm-readobj/ya.make
new file mode 100644
index 0000000000..a525cb1f02
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-readobj/ya.make
@@ -0,0 +1,50 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-readobj
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    ARMWinEHPrinter.cpp
+    COFFDumper.cpp
+    COFFImportDumper.cpp
+    ELFDumper.cpp
+    MachODumper.cpp
+    ObjDumper.cpp
+    WasmDumper.cpp
+    Win64EHDumper.cpp
+    WindowsResourceDumper.cpp
+    XCOFFDumper.cpp
+    llvm-readobj.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-reduce/ya.make b/contrib/libs/llvm12/tools/llvm-reduce/ya.make
new file mode 100644
index 0000000000..621e46c90d
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-reduce/ya.make
@@ -0,0 +1,80 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-reduce
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    TestRunner.cpp
+    deltas/Delta.cpp
+    deltas/ReduceAliases.cpp
+    deltas/ReduceArguments.cpp
+    deltas/ReduceAttributes.cpp
+    deltas/ReduceBasicBlocks.cpp
+    deltas/ReduceFunctionBodies.cpp
+    deltas/ReduceFunctions.cpp
+    deltas/ReduceGlobalVarInitializers.cpp
+    deltas/ReduceGlobalVars.cpp
+    deltas/ReduceInstructions.cpp
+    deltas/ReduceMetadata.cpp
+    deltas/ReduceOperandBundles.cpp
+    deltas/ReduceSpecialGlobals.cpp
+    llvm-reduce.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-rtdyld/ya.make b/contrib/libs/llvm12/tools/llvm-rtdyld/ya.make
new file mode 100644
index 0000000000..cfce473613
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-rtdyld/ya.make
@@ -0,0 +1,59 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/ExecutionEngine
+    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-rtdyld
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-rtdyld.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-size/ya.make b/contrib/libs/llvm12/tools/llvm-size/ya.make
new file mode 100644
index 0000000000..26c9ef9ac9
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-size/ya.make
@@ -0,0 +1,36 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-size
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-size.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-split/ya.make b/contrib/libs/llvm12/tools/llvm-split/ya.make
new file mode 100644
index 0000000000..62e248f852
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-split/ya.make
@@ -0,0 +1,43 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/Utils
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-split
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-split.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-stress/ya.make b/contrib/libs/llvm12/tools/llvm-stress/ya.make
new file mode 100644
index 0000000000..b24a02cbe6
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-stress/ya.make
@@ -0,0 +1,33 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-stress
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-stress.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-strings/ya.make b/contrib/libs/llvm12/tools/llvm-strings/ya.make
new file mode 100644
index 0000000000..83b05cc9c9
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-strings/ya.make
@@ -0,0 +1,29 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-strings
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-strings.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make b/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make
new file mode 100644
index 0000000000..ce5c02323c
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make
@@ -0,0 +1,44 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Option
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer
+    contrib/libs/llvm12/tools/llvm-symbolizer
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-symbolizer.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-undname/ya.make b/contrib/libs/llvm12/tools/llvm-undname/ya.make
new file mode 100644
index 0000000000..78446723ca
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-undname/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-undname
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    llvm-undname.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/llvm-xray/ya.make b/contrib/libs/llvm12/tools/llvm-xray/ya.make
new file mode 100644
index 0000000000..2ef035e2c4
--- /dev/null
+++ b/contrib/libs/llvm12/tools/llvm-xray/ya.make
@@ -0,0 +1,52 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/XRay
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/llvm-xray
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    func-id-helper.cpp
+    llvm-xray.cpp
+    xray-account.cpp
+    xray-color-helper.cpp
+    xray-converter.cpp
+    xray-extract.cpp
+    xray-fdr-dump.cpp
+    xray-graph-diff.cpp
+    xray-graph.cpp
+    xray-registry.cpp
+    xray-stacks.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/lto/ya.make b/contrib/libs/llvm12/tools/lto/ya.make
new file mode 100644
index 0000000000..b7b1ad5e19
--- /dev/null
+++ b/contrib/libs/llvm12/tools/lto/ya.make
@@ -0,0 +1,63 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/LTO
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/lto
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    LTODisassembler.cpp
+    lto.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/obj2yaml/ya.make b/contrib/libs/llvm12/tools/obj2yaml/ya.make
new file mode 100644
index 0000000000..c5046efb59
--- /dev/null
+++ b/contrib/libs/llvm12/tools/obj2yaml/ya.make
@@ -0,0 +1,47 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ObjectYAML
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/obj2yaml
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    archive2yaml.cpp
+    coff2yaml.cpp
+    dwarf2yaml.cpp
+    elf2yaml.cpp
+    macho2yaml.cpp
+    minidump2yaml.cpp
+    obj2yaml.cpp
+    wasm2yaml.cpp
+    xcoff2yaml.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/opt/ya.make b/contrib/libs/llvm12/tools/opt/ya.make
new file mode 100644
index 0000000000..7806e7c0ed
--- /dev/null
+++ b/contrib/libs/llvm12/tools/opt/ya.make
@@ -0,0 +1,98 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/CodeGen
+    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
+    contrib/libs/llvm12/lib/CodeGen/GlobalISel
+    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Extensions
+    contrib/libs/llvm12/lib/Frontend/OpenMP
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Target/AArch64
+    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM
+    contrib/libs/llvm12/lib/Target/ARM/AsmParser
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF
+    contrib/libs/llvm12/lib/Target/BPF/AsmParser
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC
+    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86
+    contrib/libs/llvm12/lib/Target/X86/AsmParser
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
+    contrib/libs/llvm12/lib/Transforms/CFGuard
+    contrib/libs/llvm12/lib/Transforms/Coroutines
+    contrib/libs/llvm12/lib/Transforms/HelloNew
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Instrumentation
+    contrib/libs/llvm12/lib/Transforms/ObjCARC
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/opt
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AnalysisWrappers.cpp
+    BreakpointPrinter.cpp
+    GraphPrinters.cpp
+    NewPMDriver.cpp
+    PassPrinters.cpp
+    PrintSCC.cpp
+    opt.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/polly/lib/External/isl/ya.make b/contrib/libs/llvm12/tools/polly/lib/External/isl/ya.make
new file mode 100644
index 0000000000..1a26b5e646
--- /dev/null
+++ b/contrib/libs/llvm12/tools/polly/lib/External/isl/ya.make
@@ -0,0 +1,110 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(MIT)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/polly/lib/External
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+    contrib/libs/llvm12/tools/polly/lib/External/isl/imath
+    contrib/libs/llvm12/tools/polly/lib/External/isl/include
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_RUNTIME()
+
+SRCS(
+    basis_reduction_tab.c
+    imath/gmp_compat.c
+    imath/imath.c
+    imath/imrat.c
+    isl_aff.c
+    isl_aff_map.c
+    isl_affine_hull.c
+    isl_arg.c
+    isl_ast.c
+    isl_ast_build.c
+    isl_ast_build_expr.c
+    isl_ast_codegen.c
+    isl_ast_graft.c
+    isl_bernstein.c
+    isl_blk.c
+    isl_bound.c
+    isl_box.c
+    isl_coalesce.c
+    isl_constraint.c
+    isl_convex_hull.c
+    isl_ctx.c
+    isl_deprecated.c
+    isl_dim_map.c
+    isl_equalities.c
+    isl_factorization.c
+    isl_farkas.c
+    isl_ffs.c
+    isl_flow.c
+    isl_fold.c
+    isl_hash.c
+    isl_id.c
+    isl_id_to_ast_expr.c
+    isl_id_to_id.c
+    isl_id_to_pw_aff.c
+    isl_ilp.c
+    isl_imath.c
+    isl_input.c
+    isl_int_sioimath.c
+    isl_local.c
+    isl_local_space.c
+    isl_lp.c
+    isl_map.c
+    isl_map_list.c
+    isl_map_simplify.c
+    isl_map_subtract.c
+    isl_map_to_basic_set.c
+    isl_mat.c
+    isl_morph.c
+    isl_obj.c
+    isl_options.c
+    isl_output.c
+    isl_point.c
+    isl_polynomial.c
+    isl_printer.c
+    isl_range.c
+    isl_reordering.c
+    isl_sample.c
+    isl_scan.c
+    isl_schedule.c
+    isl_schedule_band.c
+    isl_schedule_constraints.c
+    isl_schedule_node.c
+    isl_schedule_read.c
+    isl_schedule_tree.c
+    isl_scheduler.c
+    isl_seq.c
+    isl_set_list.c
+    isl_set_to_ast_graft_list.c
+    isl_sort.c
+    isl_space.c
+    isl_stream.c
+    isl_stride.c
+    isl_tab.c
+    isl_tab_pip.c
+    isl_tarjan.c
+    isl_transitive_closure.c
+    isl_union_map.c
+    isl_val.c
+    isl_val_sioimath.c
+    isl_vec.c
+    isl_version.c
+    isl_vertices.c
+    print.c
+    set_from_map.c
+    set_to_map.c
+    uset_from_umap.c
+    uset_to_umap.c
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/polly/lib/External/ppcg/ya.make b/contrib/libs/llvm12/tools/polly/lib/External/ppcg/ya.make
new file mode 100644
index 0000000000..b388690ba6
--- /dev/null
+++ b/contrib/libs/llvm12/tools/polly/lib/External/ppcg/ya.make
@@ -0,0 +1,49 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(MIT)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/polly/lib/External
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+    contrib/libs/llvm12/tools/polly/lib/External/isl/include
+    contrib/libs/llvm12/tools/polly/lib/External/pet/include
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_RUNTIME()
+
+IF (OS_WINDOWS)
+    CFLAGS(
+        -DPATH_MAX=260
+    )
+ENDIF()
+
+SRCS(
+    cuda.c
+    cuda_common.c
+    external.c
+    gpu.c
+    gpu_array_tile.c
+    gpu_group.c
+    gpu_hybrid.c
+    gpu_print.c
+    gpu_tree.c
+    grouping.c
+    hybrid.c
+    ppcg.c
+    ppcg_options.c
+    print.c
+    schedule.c
+    util.c
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/polly/lib/ya.make b/contrib/libs/llvm12/tools/polly/lib/ya.make
new file mode 100644
index 0000000000..19dd3260cd
--- /dev/null
+++ b/contrib/libs/llvm12/tools/polly/lib/ya.make
@@ -0,0 +1,95 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    MIT
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/Linker
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Passes
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target
+    contrib/libs/llvm12/lib/Transforms/IPO
+    contrib/libs/llvm12/lib/Transforms/InstCombine
+    contrib/libs/llvm12/lib/Transforms/Scalar
+    contrib/libs/llvm12/lib/Transforms/Utils
+    contrib/libs/llvm12/lib/Transforms/Vectorize
+    contrib/libs/llvm12/tools/polly/lib/External/isl
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/polly/include
+    contrib/libs/llvm12/tools/polly/lib
+    contrib/libs/llvm12/tools/polly/lib/External
+    contrib/libs/llvm12/tools/polly/lib/External/isl/include
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    Analysis/DependenceInfo.cpp
+    Analysis/PolyhedralInfo.cpp
+    Analysis/PruneUnprofitable.cpp
+    Analysis/ScopBuilder.cpp
+    Analysis/ScopDetection.cpp
+    Analysis/ScopDetectionDiagnostic.cpp
+    Analysis/ScopGraphPrinter.cpp
+    Analysis/ScopInfo.cpp
+    Analysis/ScopPass.cpp
+    CodeGen/BlockGenerators.cpp
+    CodeGen/CodeGeneration.cpp
+    CodeGen/CodegenCleanup.cpp
+    CodeGen/IRBuilder.cpp
+    CodeGen/IslAst.cpp
+    CodeGen/IslExprBuilder.cpp
+    CodeGen/IslNodeBuilder.cpp
+    CodeGen/LoopGenerators.cpp
+    CodeGen/LoopGeneratorsGOMP.cpp
+    CodeGen/LoopGeneratorsKMP.cpp
+    CodeGen/PerfMonitor.cpp
+    CodeGen/RuntimeDebugBuilder.cpp
+    CodeGen/Utils.cpp
+    Exchange/JSONExporter.cpp
+    Support/DumpModulePass.cpp
+    Support/GICHelper.cpp
+    Support/ISLTools.cpp
+    Support/RegisterPasses.cpp
+    Support/SCEVAffinator.cpp
+    Support/SCEVValidator.cpp
+    Support/ScopHelper.cpp
+    Support/ScopLocation.cpp
+    Support/VirtualInstruction.cpp
+    Transform/Canonicalization.cpp
+    Transform/CodePreparation.cpp
+    Transform/DeLICM.cpp
+    Transform/DeadCodeElimination.cpp
+    Transform/FlattenAlgo.cpp
+    Transform/FlattenSchedule.cpp
+    Transform/ForwardOpTree.cpp
+    Transform/MaximalStaticExpansion.cpp
+    Transform/RewriteByReferenceParameters.cpp
+    Transform/ScheduleOptimizer.cpp
+    Transform/ScheduleTreeTransform.cpp
+    Transform/ScopInliner.cpp
+    Transform/Simplify.cpp
+    Transform/ZoneAlgo.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/remarks-shlib/ya.make b/contrib/libs/llvm12/tools/remarks-shlib/ya.make
new file mode 100644
index 0000000000..f3a099fa42
--- /dev/null
+++ b/contrib/libs/llvm12/tools/remarks-shlib/ya.make
@@ -0,0 +1,26 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Remarks
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/remarks-shlib
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    libremarks.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/sancov/ya.make b/contrib/libs/llvm12/tools/sancov/ya.make
new file mode 100644
index 0000000000..b2574e4dac
--- /dev/null
+++ b/contrib/libs/llvm12/tools/sancov/ya.make
@@ -0,0 +1,61 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCDisassembler
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
+    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
+    contrib/libs/llvm12/lib/Target/AArch64/Utils
+    contrib/libs/llvm12/lib/Target/ARM/Disassembler
+    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
+    contrib/libs/llvm12/lib/Target/ARM/Utils
+    contrib/libs/llvm12/lib/Target/BPF/Disassembler
+    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
+    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
+    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
+    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
+    contrib/libs/llvm12/lib/Target/X86/Disassembler
+    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
+    contrib/libs/llvm12/lib/Target/X86/TargetInfo
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/sancov
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    sancov.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/sanstats/ya.make b/contrib/libs/llvm12/tools/sanstats/ya.make
new file mode 100644
index 0000000000..55384128c6
--- /dev/null
+++ b/contrib/libs/llvm12/tools/sanstats/ya.make
@@ -0,0 +1,42 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/DebugInfo/DWARF
+    contrib/libs/llvm12/lib/DebugInfo/MSF
+    contrib/libs/llvm12/lib/DebugInfo/PDB
+    contrib/libs/llvm12/lib/DebugInfo/Symbolize
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/sanstats
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    sanstats.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/split-file/ya.make b/contrib/libs/llvm12/tools/split-file/ya.make
new file mode 100644
index 0000000000..bdc38c1146
--- /dev/null
+++ b/contrib/libs/llvm12/tools/split-file/ya.make
@@ -0,0 +1,27 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Support
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/split-file
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    split-file.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/verify-uselistorder/ya.make b/contrib/libs/llvm12/tools/verify-uselistorder/ya.make
new file mode 100644
index 0000000000..c34b917367
--- /dev/null
+++ b/contrib/libs/llvm12/tools/verify-uselistorder/ya.make
@@ -0,0 +1,42 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/include
+    contrib/libs/llvm12/lib/Analysis
+    contrib/libs/llvm12/lib/AsmParser
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitcode/Writer
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/IRReader
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ProfileData
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/verify-uselistorder
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    verify-uselistorder.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/tools/yaml2obj/ya.make b/contrib/libs/llvm12/tools/yaml2obj/ya.make
new file mode 100644
index 0000000000..873ffd9929
--- /dev/null
+++ b/contrib/libs/llvm12/tools/yaml2obj/ya.make
@@ -0,0 +1,38 @@
+# Generated by devtools/yamaker.
+
+PROGRAM()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/BinaryFormat
+    contrib/libs/llvm12/lib/Bitcode/Reader
+    contrib/libs/llvm12/lib/Bitstream/Reader
+    contrib/libs/llvm12/lib/DebugInfo/CodeView
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/IR
+    contrib/libs/llvm12/lib/MC
+    contrib/libs/llvm12/lib/MC/MCParser
+    contrib/libs/llvm12/lib/Object
+    contrib/libs/llvm12/lib/ObjectYAML
+    contrib/libs/llvm12/lib/Remarks
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TextAPI/MachO
+)
+
+ADDINCL(
+    contrib/libs/llvm12/tools/yaml2obj
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    yaml2obj.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make b/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make
new file mode 100644
index 0000000000..7dffd39f6f
--- /dev/null
+++ b/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make
@@ -0,0 +1,32 @@
+# Generated by devtools/yamaker.
+
+LIBRARY()
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+)
+
+ADDINCL(
+    contrib/libs/llvm12/utils/TableGen/GlobalISel
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    CodeExpander.cpp
+    GIMatchDag.cpp
+    GIMatchDagEdge.cpp
+    GIMatchDagInstr.cpp
+    GIMatchDagOperands.cpp
+    GIMatchDagPredicate.cpp
+    GIMatchDagPredicateDependencyEdge.cpp
+    GIMatchTree.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/utils/TableGen/ya.make b/contrib/libs/llvm12/utils/TableGen/ya.make
new file mode 100644
index 0000000000..2cda74481e
--- /dev/null
+++ b/contrib/libs/llvm12/utils/TableGen/ya.make
@@ -0,0 +1,80 @@
+# Generated by devtools/yamaker.
+
+PROGRAM(llvm-tblgen)
+
+LICENSE(Apache-2.0 WITH LLVM-exception)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+PEERDIR(
+    contrib/libs/llvm12
+    contrib/libs/llvm12/lib/Demangle
+    contrib/libs/llvm12/lib/Support
+    contrib/libs/llvm12/lib/TableGen
+    contrib/libs/llvm12/utils/TableGen/GlobalISel
+)
+
+ADDINCL(
+    contrib/libs/llvm12/utils/TableGen
+)
+
+NO_COMPILER_WARNINGS()
+
+NO_UTIL()
+
+SRCS(
+    AsmMatcherEmitter.cpp
+    AsmWriterEmitter.cpp
+    AsmWriterInst.cpp
+    Attributes.cpp
+    CTagsEmitter.cpp
+    CallingConvEmitter.cpp
+    CodeEmitterGen.cpp
+    CodeGenDAGPatterns.cpp
+    CodeGenHwModes.cpp
+    CodeGenInstruction.cpp
+    CodeGenMapTable.cpp
+    CodeGenRegisters.cpp
+    CodeGenSchedule.cpp
+    CodeGenTarget.cpp
+    DAGISelEmitter.cpp
+    DAGISelMatcher.cpp
+    DAGISelMatcherEmitter.cpp
+    DAGISelMatcherGen.cpp
+    DAGISelMatcherOpt.cpp
+    DFAEmitter.cpp
+    DFAPacketizerEmitter.cpp
+    DirectiveEmitter.cpp
+    DisassemblerEmitter.cpp
+    ExegesisEmitter.cpp
+    FastISelEmitter.cpp
+    FixedLenDecoderEmitter.cpp
+    GICombinerEmitter.cpp
+    GlobalISelEmitter.cpp
+    InfoByHwMode.cpp
+    InstrDocsEmitter.cpp
+    InstrInfoEmitter.cpp
+    IntrinsicEmitter.cpp
+    OptEmitter.cpp
+    OptParserEmitter.cpp
+    OptRSTEmitter.cpp
+    PredicateExpander.cpp
+    PseudoLoweringEmitter.cpp
+    RISCVCompressInstEmitter.cpp
+    RegisterBankEmitter.cpp
+    RegisterInfoEmitter.cpp
+    SDNodeProperties.cpp
+    SearchableTableEmitter.cpp
+    SubtargetEmitter.cpp
+    SubtargetFeatureInfo.cpp
+    TableGen.cpp
+    Types.cpp
+    WebAssemblyDisassemblerEmitter.cpp
+    X86DisassemblerTables.cpp
+    X86EVEX2VEXTablesEmitter.cpp
+    X86FoldTablesEmitter.cpp
+    X86ModRMFilters.cpp
+    X86RecognizableInstr.cpp
+)
+
+END()
diff --git a/contrib/libs/llvm12/ya.make b/contrib/libs/llvm12/ya.make
new file mode 100644
index 0000000000..fa17df6b8e
--- /dev/null
+++ b/contrib/libs/llvm12/ya.make
@@ -0,0 +1,204 @@
+# Generated by devtools/yamaker from nixpkgs 21.11.
+
+LIBRARY()
+
+LICENSE(
+    Apache-2.0 WITH LLVM-exception AND
+    NCSA
+)
+
+LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
+
+VERSION(12.0.1)
+
+ORIGINAL_SOURCE(https://github.com/llvm/llvm-project/releases/download/llvmorg-12.0.1/llvm-12.0.1.src.tar.xz)
+
+ADDINCL(
+    GLOBAL ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/include
+    GLOBAL contrib/libs/llvm12/include
+)
+
+END()
+
+RECURSE(
+    include
+    lib/Analysis
+    lib/AsmParser
+    lib/BinaryFormat
+    lib/Bitcode/Reader
+    lib/Bitcode/Writer
+    lib/Bitstream/Reader
+    lib/CodeGen
+    lib/CodeGen/AsmPrinter
+    lib/CodeGen/GlobalISel
+    lib/CodeGen/MIRParser
+    lib/CodeGen/SelectionDAG
+    lib/DWARFLinker
+    lib/DebugInfo/CodeView
+    lib/DebugInfo/DWARF
+    lib/DebugInfo/GSYM
+    lib/DebugInfo/MSF
+    lib/DebugInfo/PDB
+    lib/DebugInfo/Symbolize
+    lib/Demangle
+    lib/ExecutionEngine
+    lib/ExecutionEngine/Interpreter
+    lib/ExecutionEngine/JITLink
+    lib/ExecutionEngine/MCJIT
+    lib/ExecutionEngine/Orc
+    lib/ExecutionEngine/Orc/Shared
+    lib/ExecutionEngine/Orc/TargetProcess
+    lib/ExecutionEngine/RuntimeDyld
+    lib/Extensions
+    lib/FileCheck
+    lib/Frontend/OpenACC
+    lib/Frontend/OpenMP
+    lib/FuzzMutate
+    lib/IR
+    lib/IRReader
+    lib/InterfaceStub
+    lib/LTO
+    lib/LineEditor
+    lib/Linker
+    lib/MC
+    lib/MC/MCDisassembler
+    lib/MC/MCParser
+    lib/MCA
+    lib/Object
+    lib/ObjectYAML
+    lib/Option
+    lib/Passes
+    lib/ProfileData
+    lib/ProfileData/Coverage
+    lib/Remarks
+    lib/Support
+    lib/TableGen
+    lib/Target
+    lib/Target/AArch64
+    lib/Target/AArch64/AsmParser
+    lib/Target/AArch64/Disassembler
+    lib/Target/AArch64/MCTargetDesc
+    lib/Target/AArch64/TargetInfo
+    lib/Target/AArch64/Utils
+    lib/Target/ARM
+    lib/Target/ARM/AsmParser
+    lib/Target/ARM/Disassembler
+    lib/Target/ARM/MCTargetDesc
+    lib/Target/ARM/TargetInfo
+    lib/Target/ARM/Utils
+    lib/Target/BPF
+    lib/Target/BPF/AsmParser
+    lib/Target/BPF/Disassembler
+    lib/Target/BPF/MCTargetDesc
+    lib/Target/BPF/TargetInfo
+    lib/Target/NVPTX
+    lib/Target/NVPTX/MCTargetDesc
+    lib/Target/NVPTX/TargetInfo
+    lib/Target/PowerPC
+    lib/Target/PowerPC/AsmParser
+    lib/Target/PowerPC/Disassembler
+    lib/Target/PowerPC/MCTargetDesc
+    lib/Target/PowerPC/TargetInfo
+    lib/Target/X86
+    lib/Target/X86/AsmParser
+    lib/Target/X86/Disassembler
+    lib/Target/X86/MCTargetDesc
+    lib/Target/X86/TargetInfo
+    lib/TextAPI/MachO
+    lib/ToolDrivers/llvm-dlltool
+    lib/ToolDrivers/llvm-lib
+    lib/Transforms/AggressiveInstCombine
+    lib/Transforms/CFGuard
+    lib/Transforms/Coroutines
+    lib/Transforms/HelloNew
+    lib/Transforms/IPO
+    lib/Transforms/InstCombine
+    lib/Transforms/Instrumentation
+    lib/Transforms/ObjCARC
+    lib/Transforms/Scalar
+    lib/Transforms/Utils
+    lib/Transforms/Vectorize
+    lib/WindowsManifest
+    lib/XRay
+    tools/bugpoint
+    tools/dsymutil
+    tools/llc
+    tools/lli
+    tools/lli/ChildTarget
+    tools/llvm-ar
+    tools/llvm-as
+    tools/llvm-bcanalyzer
+    tools/llvm-cat
+    tools/llvm-cfi-verify
+    tools/llvm-cfi-verify/lib
+    tools/llvm-config
+    tools/llvm-cov
+    tools/llvm-cvtres
+    tools/llvm-cxxdump
+    tools/llvm-cxxfilt
+    tools/llvm-cxxmap
+    tools/llvm-diff
+    tools/llvm-dis
+    tools/llvm-dwarfdump
+    tools/llvm-dwp
+    tools/llvm-elfabi
+    tools/llvm-exegesis
+    tools/llvm-exegesis/lib
+    tools/llvm-exegesis/lib/AArch64
+    tools/llvm-exegesis/lib/PowerPC
+    tools/llvm-exegesis/lib/X86
+    tools/llvm-extract
+    tools/llvm-gsymutil
+    tools/llvm-ifs
+    tools/llvm-jitlink
+    tools/llvm-jitlink/llvm-jitlink-executor
+    tools/llvm-libtool-darwin
+    tools/llvm-link
+    tools/llvm-lipo
+    tools/llvm-lto
+    tools/llvm-lto2
+    tools/llvm-mc
+    tools/llvm-mca
+    tools/llvm-ml
+    tools/llvm-modextract
+    tools/llvm-mt
+    tools/llvm-nm
+    tools/llvm-objcopy
+    tools/llvm-objdump
+    tools/llvm-opt-report
+    tools/llvm-pdbutil
+    tools/llvm-profdata
+    tools/llvm-profgen
+    tools/llvm-rc
+    tools/llvm-readobj
+    tools/llvm-reduce
+    tools/llvm-rtdyld
+    tools/llvm-size
+    tools/llvm-split
+    tools/llvm-stress
+    tools/llvm-strings
+    tools/llvm-symbolizer
+    tools/llvm-undname
+    tools/llvm-xray
+    tools/lto
+    tools/obj2yaml
+    tools/opt
+    tools/polly/lib
+    tools/polly/lib/External/isl
+    tools/polly/lib/External/ppcg
+    tools/remarks-shlib
+    tools/sancov
+    tools/sanstats
+    tools/split-file
+    tools/verify-uselistorder
+    tools/yaml2obj
+    utils/TableGen
+    utils/TableGen/GlobalISel
+)
+
+IF (OS_LINUX)
+    RECURSE(
+        lib/ExecutionEngine/PerfJITEvents
+        tools/gold
+    )
+ENDIF()