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authorarcadia-devtools <arcadia-devtools@yandex-team.ru>2022-02-17 10:00:11 +0300
committerarcadia-devtools <arcadia-devtools@yandex-team.ru>2022-02-17 10:00:11 +0300
commit238dcee0609b29afef350ad1ec1f11a5f77f3ddb (patch)
tree60c8fceccb240051282831ee7c022d5d13176497 /contrib/libs/llvm12
parent6556439410107545365e31cda892ba81dbeb5b2e (diff)
downloadydb-238dcee0609b29afef350ad1ec1f11a5f77f3ddb.tar.gz
intermediate changes
ref:9d0ab25c9bb4423427bb19b3ca25ded76535a4df
Diffstat (limited to 'contrib/libs/llvm12')
-rw-r--r--contrib/libs/llvm12/include/llvm/CodeGen/MachineBasicBlock.h91
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MachineBasicBlock.cpp18
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/RegAllocFast.cpp6
-rw-r--r--contrib/libs/llvm12/lib/Target/X86/X86ISelLowering.cpp3
4 files changed, 113 insertions, 5 deletions
diff --git a/contrib/libs/llvm12/include/llvm/CodeGen/MachineBasicBlock.h b/contrib/libs/llvm12/include/llvm/CodeGen/MachineBasicBlock.h
index fb36c30de8..b77035f5e9 100644
--- a/contrib/libs/llvm12/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/contrib/libs/llvm12/include/llvm/CodeGen/MachineBasicBlock.h
@@ -417,6 +417,97 @@ public:
/// Remove entry from the livein set and return iterator to the next.
livein_iterator removeLiveIn(livein_iterator I);
+ class liveout_iterator {
+ public:
+ using iterator_category = std::input_iterator_tag;
+ using difference_type = std::ptrdiff_t;
+ using value_type = RegisterMaskPair;
+ using pointer = const RegisterMaskPair *;
+ using reference = const RegisterMaskPair &;
+
+ liveout_iterator(const MachineBasicBlock &MBB, MCPhysReg ExceptionPointer,
+ MCPhysReg ExceptionSelector, bool End)
+ : ExceptionPointer(ExceptionPointer),
+ ExceptionSelector(ExceptionSelector), BlockI(MBB.succ_begin()),
+ BlockEnd(MBB.succ_end()) {
+ if (End)
+ BlockI = BlockEnd;
+ else if (BlockI != BlockEnd) {
+ LiveRegI = (*BlockI)->livein_begin();
+ if (!advanceToValidPosition())
+ return;
+ if (LiveRegI->PhysReg == ExceptionPointer ||
+ LiveRegI->PhysReg == ExceptionSelector)
+ ++(*this);
+ }
+ }
+
+ liveout_iterator &operator++() {
+ do {
+ ++LiveRegI;
+ if (!advanceToValidPosition())
+ return *this;
+ } while ((*BlockI)->isEHPad() &&
+ (LiveRegI->PhysReg == ExceptionPointer ||
+ LiveRegI->PhysReg == ExceptionSelector));
+ return *this;
+ }
+
+ liveout_iterator operator++(int) {
+ liveout_iterator Tmp = *this;
+ ++(*this);
+ return Tmp;
+ }
+
+ reference operator*() const {
+ return *LiveRegI;
+ }
+
+ pointer operator->() const {
+ return &*LiveRegI;
+ }
+
+ bool operator==(const liveout_iterator &RHS) const {
+ if (BlockI != BlockEnd)
+ return BlockI == RHS.BlockI && LiveRegI == RHS.LiveRegI;
+ return RHS.BlockI == BlockEnd;
+ }
+
+ bool operator!=(const liveout_iterator &RHS) const {
+ return !(*this == RHS);
+ }
+ private:
+ bool advanceToValidPosition() {
+ if (LiveRegI != (*BlockI)->livein_end())
+ return true;
+
+ do {
+ ++BlockI;
+ } while (BlockI != BlockEnd && (*BlockI)->livein_empty());
+ if (BlockI == BlockEnd)
+ return false;
+
+ LiveRegI = (*BlockI)->livein_begin();
+ return true;
+ }
+
+ MCPhysReg ExceptionPointer, ExceptionSelector;
+ const_succ_iterator BlockI;
+ const_succ_iterator BlockEnd;
+ livein_iterator LiveRegI;
+ };
+
+ /// Iterator scanning successor basic blocks' liveins to determine the
+ /// registers potentially live at the end of this block. There may be
+ /// duplicates or overlapping registers in the list returned.
+ liveout_iterator liveout_begin() const;
+ liveout_iterator liveout_end() const {
+ return liveout_iterator(*this, 0, 0, true);
+ }
+ iterator_range<liveout_iterator> liveouts() const {
+ return make_range(liveout_begin(), liveout_end());
+ }
+
/// Get the clobber mask for the start of this basic block. Funclets use this
/// to prevent register allocation across funclet transitions.
const uint32_t *getBeginClobberMask(const TargetRegisterInfo *TRI) const;
diff --git a/contrib/libs/llvm12/lib/CodeGen/MachineBasicBlock.cpp b/contrib/libs/llvm12/lib/CodeGen/MachineBasicBlock.cpp
index b4187af029..798484dd38 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MachineBasicBlock.cpp
+++ b/contrib/libs/llvm12/lib/CodeGen/MachineBasicBlock.cpp
@@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/Config/llvm-config.h"
@@ -1569,6 +1570,23 @@ MachineBasicBlock::livein_iterator MachineBasicBlock::livein_begin() const {
return LiveIns.begin();
}
+MachineBasicBlock::liveout_iterator MachineBasicBlock::liveout_begin() const {
+ const MachineFunction &MF = *getParent();
+ assert(MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::TracksLiveness) &&
+ "Liveness information is accurate");
+
+ const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
+ MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
+ if (MF.getFunction().hasPersonalityFn()) {
+ auto PersonalityFn = MF.getFunction().getPersonalityFn();
+ ExceptionPointer = TLI.getExceptionPointerRegister(PersonalityFn);
+ ExceptionSelector = TLI.getExceptionSelectorRegister(PersonalityFn);
+ }
+
+ return liveout_iterator(*this, ExceptionPointer, ExceptionSelector, false);
+}
+
const MBBSectionID MBBSectionID::ColdSectionID(MBBSectionID::SectionType::Cold);
const MBBSectionID
MBBSectionID::ExceptionSectionID(MBBSectionID::SectionType::Exception);
diff --git a/contrib/libs/llvm12/lib/CodeGen/RegAllocFast.cpp b/contrib/libs/llvm12/lib/CodeGen/RegAllocFast.cpp
index 6e548d4a93..1933c3d22b 100644
--- a/contrib/libs/llvm12/lib/CodeGen/RegAllocFast.cpp
+++ b/contrib/libs/llvm12/lib/CodeGen/RegAllocFast.cpp
@@ -1425,10 +1425,8 @@ void RegAllocFast::allocateBasicBlock(MachineBasicBlock &MBB) {
RegUnitStates.assign(TRI->getNumRegUnits(), regFree);
assert(LiveVirtRegs.empty() && "Mapping not cleared from last block?");
- for (MachineBasicBlock *Succ : MBB.successors()) {
- for (const MachineBasicBlock::RegisterMaskPair &LI : Succ->liveins())
- setPhysRegState(LI.PhysReg, regPreAssigned);
- }
+ for (auto &LiveReg : MBB.liveouts())
+ setPhysRegState(LiveReg.PhysReg, regPreAssigned);
Coalesced.clear();
diff --git a/contrib/libs/llvm12/lib/Target/X86/X86ISelLowering.cpp b/contrib/libs/llvm12/lib/Target/X86/X86ISelLowering.cpp
index 1e2407c7e7..136b71d2cf 100644
--- a/contrib/libs/llvm12/lib/Target/X86/X86ISelLowering.cpp
+++ b/contrib/libs/llvm12/lib/Target/X86/X86ISelLowering.cpp
@@ -26632,7 +26632,8 @@ Register X86TargetLowering::getExceptionPointerRegister(
Register X86TargetLowering::getExceptionSelectorRegister(
const Constant *PersonalityFn) const {
// Funclet personalities don't use selectors (the runtime does the selection).
- assert(!isFuncletEHPersonality(classifyEHPersonality(PersonalityFn)));
+ if (isFuncletEHPersonality(classifyEHPersonality(PersonalityFn)))
+ return X86::NoRegister;
return Subtarget.isTarget64BitLP64() ? X86::RDX : X86::EDX;
}