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authorshadchin <shadchin@yandex-team.ru>2022-02-10 16:44:39 +0300
committerDaniil Cherednik <dcherednik@yandex-team.ru>2022-02-10 16:44:39 +0300
commite9656aae26e0358d5378e5b63dcac5c8dbe0e4d0 (patch)
tree64175d5cadab313b3e7039ebaa06c5bc3295e274 /contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
parent2598ef1d0aee359b4b6d5fdd1758916d5907d04f (diff)
downloadydb-e9656aae26e0358d5378e5b63dcac5c8dbe0e4d0.tar.gz
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 2 of 2.
Diffstat (limited to 'contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp')
-rw-r--r--contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp18
1 files changed, 9 insertions, 9 deletions
diff --git a/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp b/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
index 3ecd8bd5a4..12af92e0d1 100644
--- a/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
+++ b/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
@@ -13,7 +13,7 @@
#include "MCTargetDesc/BPFMCTargetDesc.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixup.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
@@ -159,18 +159,18 @@ void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
- // For CMPXCHG instructions, output is implicitly in R0/W0,
- // so memory operand starts from operand 0.
- int MemOpStartIndex = 1, Opcode = MI.getOpcode();
- if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD)
- MemOpStartIndex = 0;
-
+ // For CMPXCHG instructions, output is implicitly in R0/W0,
+ // so memory operand starts from operand 0.
+ int MemOpStartIndex = 1, Opcode = MI.getOpcode();
+ if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD)
+ MemOpStartIndex = 0;
+
uint64_t Encoding;
- const MCOperand Op1 = MI.getOperand(MemOpStartIndex);
+ const MCOperand Op1 = MI.getOperand(MemOpStartIndex);
assert(Op1.isReg() && "First operand is not register.");
Encoding = MRI.getEncodingValue(Op1.getReg());
Encoding <<= 16;
- MCOperand Op2 = MI.getOperand(MemOpStartIndex + 1);
+ MCOperand Op2 = MI.getOperand(MemOpStartIndex + 1);
assert(Op2.isImm() && "Second operand is not immediate.");
Encoding |= Op2.getImm() & 0xffff;
return Encoding;