Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.

1 files changed, 90 insertions, 90 deletions

diff --git a/contrib/libs/llvm12/lib/Target/ARM/ARM.td b/contrib/libs/llvm12/lib/Target/ARM/ARM.td
index 3d0a0bf7f8..9540784c7f 100644
--- a/contrib/libs/llvm12/lib/Target/ARM/ARM.td
+++ b/contrib/libs/llvm12/lib/Target/ARM/ARM.td
@@ -535,10 +535,10 @@ def HasV8_6aOps   : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true",
                                    [HasV8_5aOps, FeatureBF16,
                                     FeatureMatMulInt8]>;
 
-def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
-                                   "Support ARM v8.7a instructions",
-                                   [HasV8_6aOps]>;
-
+def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true", 
+                                   "Support ARM v8.7a instructions", 
+                                   [HasV8_6aOps]>; 
+ 
 def HasV8_1MMainlineOps : SubtargetFeature<
                "v8.1m.main", "HasV8_1MMainlineOps", "true",
                "Support ARM v8-1M Mainline instructions",
@@ -563,20 +563,20 @@ foreach i = {0-7} in
                                               [HasCDEOps]>;
 
 //===----------------------------------------------------------------------===//
-// Control codegen mitigation against Straight Line Speculation vulnerability.
-//===----------------------------------------------------------------------===//
-
-def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr",
-  "HardenSlsRetBr", "true",
-  "Harden against straight line speculation across RETurn and BranchRegister "
-  "instructions">;
-def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr",
-  "HardenSlsBlr", "true",
-  "Harden against straight line speculation across indirect calls">;
-
-
-
-//===----------------------------------------------------------------------===//
+// Control codegen mitigation against Straight Line Speculation vulnerability. 
+//===----------------------------------------------------------------------===// 
+ 
+def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr", 
+  "HardenSlsRetBr", "true", 
+  "Harden against straight line speculation across RETurn and BranchRegister " 
+  "instructions">; 
+def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr", 
+  "HardenSlsBlr", "true", 
+  "Harden against straight line speculation across indirect calls">; 
+ 
+ 
+ 
+//===----------------------------------------------------------------------===// 
 // ARM Processor subtarget features.
 //
 
@@ -616,14 +616,14 @@ def ProcA77     : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
                                    "Cortex-A77 ARM processors", []>;
 def ProcA78     : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
                                    "Cortex-A78 ARM processors", []>;
-def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
-                                   "Cortex-A78C ARM processors", []>;
+def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C", 
+                                   "Cortex-A78C ARM processors", []>; 
 def ProcX1      : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
                                    "Cortex-X1 ARM processors", []>;
 
-def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
-                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>;
-
+def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily", 
+                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>; 
+ 
 def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
                                    "Qualcomm Krait processors", []>;
 def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
@@ -662,8 +662,8 @@ def ProcR52     : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
 
 def ProcM3      : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
                                    "Cortex-M3 ARM processors", []>;
-def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
-                                   "Cortex-M7 ARM processors", []>;
+def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7", 
+                                   "Cortex-M7 ARM processors", []>; 
 
 //===----------------------------------------------------------------------===//
 // ARM Helper classes.
@@ -852,19 +852,19 @@ def ARMv86a   : Architecture<"armv8.6-a", "ARMv86a",  [HasV8_6aOps,
                                                        FeatureCRC,
                                                        FeatureRAS,
                                                        FeatureDotProd]>;
-def ARMv87a   : Architecture<"armv8.7-a", "ARMv86a",  [HasV8_7aOps,
-                                                       FeatureAClass,
-                                                       FeatureDB,
-                                                       FeatureFPARMv8,
-                                                       FeatureNEON,
-                                                       FeatureDSP,
-                                                       FeatureTrustZone,
-                                                       FeatureMP,
-                                                       FeatureVirtualization,
-                                                       FeatureCrypto,
-                                                       FeatureCRC,
-                                                       FeatureRAS,
-                                                       FeatureDotProd]>;
+def ARMv87a   : Architecture<"armv8.7-a", "ARMv86a",  [HasV8_7aOps, 
+                                                       FeatureAClass, 
+                                                       FeatureDB, 
+                                                       FeatureFPARMv8, 
+                                                       FeatureNEON, 
+                                                       FeatureDSP, 
+                                                       FeatureTrustZone, 
+                                                       FeatureMP, 
+                                                       FeatureVirtualization, 
+                                                       FeatureCrypto, 
+                                                       FeatureCRC, 
+                                                       FeatureRAS, 
+                                                       FeatureDotProd]>; 
 
 def ARMv8r    : Architecture<"armv8-r",   "ARMv8r",   [HasV8Ops,
                                                        FeatureRClass,
@@ -919,14 +919,14 @@ def ARMv6j   : Architecture<"armv6j",      "ARMv7a",   [ARMv6]>;
 def ARMv7k   : Architecture<"armv7k",      "ARMv7a",   [ARMv7a]>;
 def ARMv7s   : Architecture<"armv7s",      "ARMv7a",   [ARMv7a]>;
 
-//===----------------------------------------------------------------------===//
-// Register File Description
-//===----------------------------------------------------------------------===//
-
-include "ARMRegisterInfo.td"
-include "ARMRegisterBanks.td"
-include "ARMCallingConv.td"
+//===----------------------------------------------------------------------===// 
+// Register File Description 
+//===----------------------------------------------------------------------===// 
 
+include "ARMRegisterInfo.td" 
+include "ARMRegisterBanks.td" 
+include "ARMCallingConv.td" 
+ 
 //===----------------------------------------------------------------------===//
 // ARM schedules.
 //===----------------------------------------------------------------------===//
@@ -935,25 +935,25 @@ include "ARMPredicates.td"
 include "ARMSchedule.td"
 
 //===----------------------------------------------------------------------===//
-// Instruction Descriptions
-//===----------------------------------------------------------------------===//
-
-include "ARMInstrInfo.td"
-def ARMInstrInfo : InstrInfo;
-
-//===----------------------------------------------------------------------===//
-// ARM schedules
-//
-include "ARMScheduleV6.td"
-include "ARMScheduleA8.td"
-include "ARMScheduleA9.td"
-include "ARMScheduleSwift.td"
-include "ARMScheduleR52.td"
-include "ARMScheduleA57.td"
-include "ARMScheduleM4.td"
-include "ARMScheduleM7.td"
-
-//===----------------------------------------------------------------------===//
+// Instruction Descriptions 
+//===----------------------------------------------------------------------===// 
+ 
+include "ARMInstrInfo.td" 
+def ARMInstrInfo : InstrInfo; 
+ 
+//===----------------------------------------------------------------------===// 
+// ARM schedules 
+// 
+include "ARMScheduleV6.td" 
+include "ARMScheduleA8.td" 
+include "ARMScheduleA9.td" 
+include "ARMScheduleSwift.td" 
+include "ARMScheduleR52.td" 
+include "ARMScheduleA57.td" 
+include "ARMScheduleM4.td" 
+include "ARMScheduleM7.td" 
+ 
+//===----------------------------------------------------------------------===// 
 // ARM processors
 //
 // Dummy CPU, used to target architectures
@@ -1193,10 +1193,10 @@ def : ProcessorModel<"cortex-m4", CortexM4Model,        [ARMv7em,
                                                          FeatureUseMISched,
                                                          FeatureHasNoBranchPredictor]>;
 
-def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em,
-                                                         ProcM7,
-                                                         FeatureFPARMv8_D16,
-                                                         FeatureUseMISched]>;
+def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em, 
+                                                         ProcM7, 
+                                                         FeatureFPARMv8_D16, 
+                                                         FeatureUseMISched]>; 
 
 def : ProcNoItin<"cortex-m23",                          [ARMv8mBaseline,
                                                          FeatureNoMovt]>;
@@ -1310,14 +1310,14 @@ def : ProcNoItin<"cortex-a78",                          [ARMv82a, ProcA78,
                                                          FeatureFullFP16,
                                                          FeatureDotProd]>;
 
-def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C,
-                                                         FeatureHWDivThumb,
-                                                         FeatureHWDivARM,
-                                                         FeatureCrypto,
-                                                         FeatureCRC,
-                                                         FeatureDotProd,
-                                                         FeatureFullFP16]>;
-
+def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C, 
+                                                         FeatureHWDivThumb, 
+                                                         FeatureHWDivARM, 
+                                                         FeatureCrypto, 
+                                                         FeatureCRC, 
+                                                         FeatureDotProd, 
+                                                         FeatureFullFP16]>; 
+ 
 def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
                                                          FeatureHWDivThumb,
                                                          FeatureHWDivARM,
@@ -1326,15 +1326,15 @@ def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
                                                          FeatureFullFP16,
                                                          FeatureDotProd]>;
 
-def : ProcNoItin<"neoverse-v1",                         [ARMv84a,
-                                                         FeatureHWDivThumb,
-                                                         FeatureHWDivARM,
-                                                         FeatureCrypto,
-                                                         FeatureCRC,
-                                                         FeatureFullFP16,
-                                                         FeatureBF16,
-                                                         FeatureMatMulInt8]>;
-
+def : ProcNoItin<"neoverse-v1",                         [ARMv84a, 
+                                                         FeatureHWDivThumb, 
+                                                         FeatureHWDivARM, 
+                                                         FeatureCrypto, 
+                                                         FeatureCRC, 
+                                                         FeatureFullFP16, 
+                                                         FeatureBF16, 
+                                                         FeatureMatMulInt8]>; 
+ 
 def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
                                                          FeatureHWDivThumb,
                                                          FeatureHWDivARM,
@@ -1342,11 +1342,11 @@ def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
                                                          FeatureCRC,
                                                          FeatureDotProd]>;
 
-def : ProcNoItin<"neoverse-n2",                         [ARMv85a,
-                                                         FeatureBF16,
-                                                         FeatureMatMulInt8,
-                                                         FeaturePerfMon]>;
-
+def : ProcNoItin<"neoverse-n2",                         [ARMv85a, 
+                                                         FeatureBF16, 
+                                                         FeatureMatMulInt8, 
+                                                         FeaturePerfMon]>; 
+ 
 def : ProcessorModel<"cyclone",     SwiftModel,         [ARMv8a, ProcSwift,
                                                          FeatureHasRetAddrStack,
                                                          FeatureNEONForFP,