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authorshadchin <shadchin@yandex-team.ru>2022-02-10 16:44:30 +0300
committerDaniil Cherednik <dcherednik@yandex-team.ru>2022-02-10 16:44:30 +0300
commit2598ef1d0aee359b4b6d5fdd1758916d5907d04f (patch)
tree012bb94d777798f1f56ac1cec429509766d05181 /contrib/libs/llvm12/lib/CodeGen/MIRParser
parent6751af0b0c1b952fede40b19b71da8025b5d8bcf (diff)
downloadydb-2598ef1d0aee359b4b6d5fdd1758916d5907d04f.tar.gz
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.
Diffstat (limited to 'contrib/libs/llvm12/lib/CodeGen/MIRParser')
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.cpp14
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.h4
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MIRParser/MIParser.cpp50
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MIRParser/MIRParser.cpp68
-rw-r--r--contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make18
5 files changed, 77 insertions, 77 deletions
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.cpp b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.cpp
index b86fd6b413..cb50d73355 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.cpp
@@ -212,12 +212,12 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("contract", MIToken::kw_contract)
.Case("afn", MIToken::kw_afn)
.Case("reassoc", MIToken::kw_reassoc)
- .Case("nuw", MIToken::kw_nuw)
- .Case("nsw", MIToken::kw_nsw)
- .Case("exact", MIToken::kw_exact)
+ .Case("nuw", MIToken::kw_nuw)
+ .Case("nsw", MIToken::kw_nsw)
+ .Case("exact", MIToken::kw_exact)
.Case("nofpexcept", MIToken::kw_nofpexcept)
.Case("debug-location", MIToken::kw_debug_location)
- .Case("debug-instr-number", MIToken::kw_debug_instr_number)
+ .Case("debug-instr-number", MIToken::kw_debug_instr_number)
.Case("same_value", MIToken::kw_cfi_same_value)
.Case("offset", MIToken::kw_cfi_offset)
.Case("rel_offset", MIToken::kw_cfi_rel_offset)
@@ -232,8 +232,8 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("undefined", MIToken::kw_cfi_undefined)
.Case("register", MIToken::kw_cfi_register)
.Case("window_save", MIToken::kw_cfi_window_save)
- .Case("negate_ra_sign_state",
- MIToken::kw_cfi_aarch64_negate_ra_sign_state)
+ .Case("negate_ra_sign_state",
+ MIToken::kw_cfi_aarch64_negate_ra_sign_state)
.Case("blockaddress", MIToken::kw_blockaddress)
.Case("intrinsic", MIToken::kw_intrinsic)
.Case("target-index", MIToken::kw_target_index)
@@ -249,7 +249,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("dereferenceable", MIToken::kw_dereferenceable)
.Case("invariant", MIToken::kw_invariant)
.Case("align", MIToken::kw_align)
- .Case("basealign", MIToken::kw_align)
+ .Case("basealign", MIToken::kw_align)
.Case("addrspace", MIToken::kw_addrspace)
.Case("stack", MIToken::kw_stack)
.Case("got", MIToken::kw_got)
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.h b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.h
index 452eda7213..65b60bb4ea 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.h
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MILexer.h
@@ -74,7 +74,7 @@ struct MIToken {
kw_exact,
kw_nofpexcept,
kw_debug_location,
- kw_debug_instr_number,
+ kw_debug_instr_number,
kw_cfi_same_value,
kw_cfi_offset,
kw_cfi_rel_offset,
@@ -104,7 +104,7 @@ struct MIToken {
kw_non_temporal,
kw_invariant,
kw_align,
- kw_basealign,
+ kw_basealign,
kw_addrspace,
kw_stack,
kw_got,
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIParser.cpp b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIParser.cpp
index fe979b9818..9aafce8dda 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIParser.cpp
@@ -369,7 +369,7 @@ static void initSlots2Values(const Function &F,
const Value* PerFunctionMIParsingState::getIRValue(unsigned Slot) {
if (Slots2Values.empty())
initSlots2Values(MF.getFunction(), Slots2Values);
- return Slots2Values.lookup(Slot);
+ return Slots2Values.lookup(Slot);
}
namespace {
@@ -981,7 +981,7 @@ bool MIParser::parse(MachineInstr *&MI) {
Token.isNot(MIToken::kw_post_instr_symbol) &&
Token.isNot(MIToken::kw_heap_alloc_marker) &&
Token.isNot(MIToken::kw_debug_location) &&
- Token.isNot(MIToken::kw_debug_instr_number) &&
+ Token.isNot(MIToken::kw_debug_instr_number) &&
Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
auto Loc = Token.location();
Optional<unsigned> TiedDefIdx;
@@ -1012,19 +1012,19 @@ bool MIParser::parse(MachineInstr *&MI) {
if (parseHeapAllocMarker(HeapAllocMarker))
return true;
- unsigned InstrNum = 0;
- if (Token.is(MIToken::kw_debug_instr_number)) {
- lex();
- if (Token.isNot(MIToken::IntegerLiteral))
- return error("expected an integer literal after 'debug-instr-number'");
- if (getUnsigned(InstrNum))
- return true;
- lex();
- // Lex past trailing comma if present.
- if (Token.is(MIToken::comma))
- lex();
- }
-
+ unsigned InstrNum = 0;
+ if (Token.is(MIToken::kw_debug_instr_number)) {
+ lex();
+ if (Token.isNot(MIToken::IntegerLiteral))
+ return error("expected an integer literal after 'debug-instr-number'");
+ if (getUnsigned(InstrNum))
+ return true;
+ lex();
+ // Lex past trailing comma if present.
+ if (Token.is(MIToken::comma))
+ lex();
+ }
+
DebugLoc DebugLocation;
if (Token.is(MIToken::kw_debug_location)) {
lex();
@@ -1081,8 +1081,8 @@ bool MIParser::parse(MachineInstr *&MI) {
MI->setHeapAllocMarker(MF, HeapAllocMarker);
if (!MemOperands.empty())
MI->setMemRefs(MF, MemOperands);
- if (InstrNum)
- MI->setDebugInstrNum(InstrNum);
+ if (InstrNum)
+ MI->setDebugInstrNum(InstrNum);
return false;
}
@@ -2726,7 +2726,7 @@ bool MIParser::parseOffset(int64_t &Offset) {
}
bool MIParser::parseAlignment(unsigned &Alignment) {
- assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
+ assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
lex();
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
return error("expected an integer literal after 'align'");
@@ -3074,15 +3074,15 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
while (consumeIfPresent(MIToken::comma)) {
switch (Token.kind()) {
case MIToken::kw_align:
- // align is printed if it is different than size.
- if (parseAlignment(BaseAlignment))
- return true;
- break;
- case MIToken::kw_basealign:
- // basealign is printed if it is different than align.
+ // align is printed if it is different than size.
if (parseAlignment(BaseAlignment))
return true;
break;
+ case MIToken::kw_basealign:
+ // basealign is printed if it is different than align.
+ if (parseAlignment(BaseAlignment))
+ return true;
+ break;
case MIToken::kw_addrspace:
if (parseAddrspace(Ptr.AddrSpace))
return true;
@@ -3172,7 +3172,7 @@ static void initSlots2BasicBlocks(
static const BasicBlock *getIRBlockFromSlot(
unsigned Slot,
const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
- return Slots2BasicBlocks.lookup(Slot);
+ return Slots2BasicBlocks.lookup(Slot);
}
const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIRParser.cpp b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIRParser.cpp
index ffa9aeb21e..961f8eaf97 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -161,9 +161,9 @@ private:
SMRange SourceRange);
void computeFunctionProperties(MachineFunction &MF);
-
- void setupDebugValueTracking(MachineFunction &MF,
- PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF);
+
+ void setupDebugValueTracking(MachineFunction &MF,
+ PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF);
};
} // end namespace llvm
@@ -325,14 +325,14 @@ bool MIRParserImpl::parseMachineFunction(Module &M, MachineModuleInfo &MMI) {
static bool isSSA(const MachineFunction &MF) {
const MachineRegisterInfo &MRI = MF.getRegInfo();
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
- Register Reg = Register::index2VirtReg(I);
+ Register Reg = Register::index2VirtReg(I);
if (!MRI.hasOneDef(Reg) && !MRI.def_empty(Reg))
return false;
-
- // Subregister defs are invalid in SSA.
- const MachineOperand *RegDef = MRI.getOneDef(Reg);
- if (RegDef && RegDef->getSubReg() != 0)
- return false;
+
+ // Subregister defs are invalid in SSA.
+ const MachineOperand *RegDef = MRI.getOneDef(Reg);
+ if (RegDef && RegDef->getSubReg() != 0)
+ return false;
}
return true;
}
@@ -405,23 +405,23 @@ bool MIRParserImpl::initializeCallSiteInfo(
return false;
}
-void MIRParserImpl::setupDebugValueTracking(
- MachineFunction &MF, PerFunctionMIParsingState &PFS,
- const yaml::MachineFunction &YamlMF) {
- // Compute the value of the "next instruction number" field.
- unsigned MaxInstrNum = 0;
- for (auto &MBB : MF)
- for (auto &MI : MBB)
- MaxInstrNum = std::max((unsigned)MI.peekDebugInstrNum(), MaxInstrNum);
- MF.setDebugInstrNumberingCount(MaxInstrNum);
-
- // Load any substitutions.
- for (auto &Sub : YamlMF.DebugValueSubstitutions) {
- MF.makeDebugValueSubstitution(std::make_pair(Sub.SrcInst, Sub.SrcOp),
- std::make_pair(Sub.DstInst, Sub.DstOp));
- }
-}
-
+void MIRParserImpl::setupDebugValueTracking(
+ MachineFunction &MF, PerFunctionMIParsingState &PFS,
+ const yaml::MachineFunction &YamlMF) {
+ // Compute the value of the "next instruction number" field.
+ unsigned MaxInstrNum = 0;
+ for (auto &MBB : MF)
+ for (auto &MI : MBB)
+ MaxInstrNum = std::max((unsigned)MI.peekDebugInstrNum(), MaxInstrNum);
+ MF.setDebugInstrNumberingCount(MaxInstrNum);
+
+ // Load any substitutions.
+ for (auto &Sub : YamlMF.DebugValueSubstitutions) {
+ MF.makeDebugValueSubstitution(std::make_pair(Sub.SrcInst, Sub.SrcOp),
+ std::make_pair(Sub.DstInst, Sub.DstOp));
+ }
+}
+
bool
MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
MachineFunction &MF) {
@@ -530,8 +530,8 @@ MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
if (initializeCallSiteInfo(PFS, YamlMF))
return false;
- setupDebugValueTracking(MF, PFS, YamlMF);
-
+ setupDebugValueTracking(MF, PFS, YamlMF);
+
MF.getSubtarget().mirFileLoaded(MF);
MF.verify();
@@ -659,12 +659,12 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
// Compute MachineRegisterInfo::UsedPhysRegMask
for (const MachineBasicBlock &MBB : MF) {
- // Make sure MRI knows about registers clobbered by unwinder.
- const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (MBB.isEHPad())
- if (auto *RegMask = TRI->getCustomEHPadPreservedMask(MF))
- MRI.addPhysRegsUsedFromRegMask(RegMask);
-
+ // Make sure MRI knows about registers clobbered by unwinder.
+ const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+ if (MBB.isEHPad())
+ if (auto *RegMask = TRI->getCustomEHPadPreservedMask(MF))
+ MRI.addPhysRegsUsedFromRegMask(RegMask);
+
for (const MachineInstr &MI : MBB) {
for (const MachineOperand &MO : MI.operands()) {
if (!MO.isRegMask())
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make b/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
index aa8e6d8693..cb9e044925 100644
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
+++ b/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
@@ -12,15 +12,15 @@ LICENSE(Apache-2.0 WITH LLVM-exception)
LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
PEERDIR(
- contrib/libs/llvm12
- contrib/libs/llvm12/include
- contrib/libs/llvm12/lib/AsmParser
- contrib/libs/llvm12/lib/BinaryFormat
- contrib/libs/llvm12/lib/CodeGen
- contrib/libs/llvm12/lib/IR
- contrib/libs/llvm12/lib/MC
- contrib/libs/llvm12/lib/Support
- contrib/libs/llvm12/lib/Target
+ contrib/libs/llvm12
+ contrib/libs/llvm12/include
+ contrib/libs/llvm12/lib/AsmParser
+ contrib/libs/llvm12/lib/BinaryFormat
+ contrib/libs/llvm12/lib/CodeGen
+ contrib/libs/llvm12/lib/IR
+ contrib/libs/llvm12/lib/MC
+ contrib/libs/llvm12/lib/Support
+ contrib/libs/llvm12/lib/Target
)
ADDINCL(