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authorshadchin <shadchin@yandex-team.ru>2022-02-10 16:44:30 +0300
committerDaniil Cherednik <dcherednik@yandex-team.ru>2022-02-10 16:44:30 +0300
commit2598ef1d0aee359b4b6d5fdd1758916d5907d04f (patch)
tree012bb94d777798f1f56ac1cec429509766d05181 /contrib/libs/llvm12/include/llvm/Support/TargetParser.h
parent6751af0b0c1b952fede40b19b71da8025b5d8bcf (diff)
downloadydb-2598ef1d0aee359b4b6d5fdd1758916d5907d04f.tar.gz
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.
Diffstat (limited to 'contrib/libs/llvm12/include/llvm/Support/TargetParser.h')
-rw-r--r--contrib/libs/llvm12/include/llvm/Support/TargetParser.h42
1 files changed, 21 insertions, 21 deletions
diff --git a/contrib/libs/llvm12/include/llvm/Support/TargetParser.h b/contrib/libs/llvm12/include/llvm/Support/TargetParser.h
index 08f0298aae..c1cb7deff5 100644
--- a/contrib/libs/llvm12/include/llvm/Support/TargetParser.h
+++ b/contrib/libs/llvm12/include/llvm/Support/TargetParser.h
@@ -69,20 +69,20 @@ enum GPUKind : uint32_t {
// AMDGCN-based processors.
GK_GFX600 = 32,
GK_GFX601 = 33,
- GK_GFX602 = 34,
+ GK_GFX602 = 34,
GK_GFX700 = 40,
GK_GFX701 = 41,
GK_GFX702 = 42,
GK_GFX703 = 43,
GK_GFX704 = 44,
- GK_GFX705 = 45,
+ GK_GFX705 = 45,
GK_GFX801 = 50,
GK_GFX802 = 51,
GK_GFX803 = 52,
- GK_GFX805 = 53,
- GK_GFX810 = 54,
+ GK_GFX805 = 53,
+ GK_GFX810 = 54,
GK_GFX900 = 60,
GK_GFX902 = 61,
@@ -90,18 +90,18 @@ enum GPUKind : uint32_t {
GK_GFX906 = 63,
GK_GFX908 = 64,
GK_GFX909 = 65,
- GK_GFX90C = 66,
+ GK_GFX90C = 66,
GK_GFX1010 = 71,
GK_GFX1011 = 72,
GK_GFX1012 = 73,
GK_GFX1030 = 75,
- GK_GFX1031 = 76,
- GK_GFX1032 = 77,
- GK_GFX1033 = 78,
+ GK_GFX1031 = 76,
+ GK_GFX1032 = 77,
+ GK_GFX1033 = 78,
GK_AMDGCN_FIRST = GK_GFX600,
- GK_AMDGCN_LAST = GK_GFX1033,
+ GK_AMDGCN_LAST = GK_GFX1033,
};
/// Instruction set architecture version.
@@ -126,18 +126,18 @@ enum ArchFeatureKind : uint32_t {
FEATURE_FAST_DENORMAL_F32 = 1 << 5,
// Wavefront 32 is available.
- FEATURE_WAVE32 = 1 << 6,
-
- // Xnack is available.
- FEATURE_XNACK = 1 << 7,
-
- // Sram-ecc is available.
- FEATURE_SRAMECC = 1 << 8,
+ FEATURE_WAVE32 = 1 << 6,
+
+ // Xnack is available.
+ FEATURE_XNACK = 1 << 7,
+
+ // Sram-ecc is available.
+ FEATURE_SRAMECC = 1 << 8,
};
StringRef getArchNameAMDGCN(GPUKind AK);
StringRef getArchNameR600(GPUKind AK);
-StringRef getCanonicalArchName(const Triple &T, StringRef Arch);
+StringRef getCanonicalArchName(const Triple &T, StringRef Arch);
GPUKind parseArchAMDGCN(StringRef CPU);
GPUKind parseArchR600(StringRef CPU);
unsigned getArchAttrAMDGCN(GPUKind AK);
@@ -169,14 +169,14 @@ enum FeatureKind : unsigned {
};
bool checkCPUKind(CPUKind Kind, bool IsRV64);
-bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
+bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
CPUKind parseCPUKind(StringRef CPU);
-CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
+CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
StringRef getMArchFromMcpu(StringRef CPU);
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
-void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
+void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
-StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
+StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
} // namespace RISCV