Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.

1 files changed, 108 insertions, 108 deletions

diff --git a/contrib/libs/llvm12/include/llvm/IR/VPIntrinsics.def b/contrib/libs/llvm12/include/llvm/IR/VPIntrinsics.def
index 981548c6dd..d269fff4bf 100644
--- a/contrib/libs/llvm12/include/llvm/IR/VPIntrinsics.def
+++ b/contrib/libs/llvm12/include/llvm/IR/VPIntrinsics.def
@@ -17,140 +17,140 @@
 // Provide definitions of macros so that users of this file do not have to
 // define everything to use it...
 //
-// Register a VP intrinsic and begin its property scope.
-// All VP intrinsic scopes are top level, ie it is illegal to place a
-// BEGIN_REGISTER_VP_INTRINSIC within a VP intrinsic scope.
-// \p VPID     The VP intrinsic id.
-// \p MASKPOS  The mask operand position.
-// \p EVLPOS   The explicit vector length operand position.
-#ifndef BEGIN_REGISTER_VP_INTRINSIC
-#define BEGIN_REGISTER_VP_INTRINSIC(VPID, MASKPOS, EVLPOS)
+// Register a VP intrinsic and begin its property scope. 
+// All VP intrinsic scopes are top level, ie it is illegal to place a 
+// BEGIN_REGISTER_VP_INTRINSIC within a VP intrinsic scope. 
+// \p VPID     The VP intrinsic id. 
+// \p MASKPOS  The mask operand position. 
+// \p EVLPOS   The explicit vector length operand position. 
+#ifndef BEGIN_REGISTER_VP_INTRINSIC 
+#define BEGIN_REGISTER_VP_INTRINSIC(VPID, MASKPOS, EVLPOS) 
 #endif
 
-// End the property scope of a VP intrinsic.
-#ifndef END_REGISTER_VP_INTRINSIC
-#define END_REGISTER_VP_INTRINSIC(VPID)
+// End the property scope of a VP intrinsic. 
+#ifndef END_REGISTER_VP_INTRINSIC 
+#define END_REGISTER_VP_INTRINSIC(VPID) 
 #endif
 
-// Register a new VP SDNode and begin its property scope.
-// When the SDNode scope is nested within a VP intrinsic scope, it is implicitly registered as the canonical SDNode for this VP intrinsic.
-// There is one VP intrinsic that maps directly to one SDNode that goes by the
-// same name.  Since the operands are also the same, we open the property
-// scopes for both the VPIntrinsic and the SDNode at once.
-// \p SDOPC     The SelectionDAG Node id (eg VP_ADD).
-// \p LEGALPOS The operand position of the SDNode that is used for legalizing
-//             this SDNode. This can be `-1`, in which case the return type of
-//             the SDNode is used.
-// \p TDNAME   The name of the TableGen definition of this SDNode.
-// \p MASKPOS  The mask operand position.
-// \p EVLPOS   The explicit vector length operand position.
-#ifndef BEGIN_REGISTER_VP_SDNODE
-#define BEGIN_REGISTER_VP_SDNODE(SDOPC, LEGALPOS, TDNAME, MASKPOS, EVLPOS)
-#endif
-
-// End the property scope of a new VP SDNode.
-#ifndef END_REGISTER_VP_SDNODE
-#define END_REGISTER_VP_SDNODE(SDOPC)
-#endif
-
-// Helper macros for the common "1:1 - Intrinsic : SDNode" case.
-//
-// There is one VP intrinsic that maps directly to one SDNode that goes by the
-// same name.  Since the operands are also the same, we open the property
-// scopes for both the VPIntrinsic and the SDNode at once.
-//
-// \p INTRIN   The canonical name (eg `vp_add`, which at the same time is the
-//             name of the intrinsic and the TableGen def of the SDNode).
-// \p MASKPOS  The mask operand position.
-// \p EVLPOS   The explicit vector length operand position.
-// \p SDOPC    The SelectionDAG Node id (eg VP_ADD).
-// \p LEGALPOS The operand position of the SDNode that is used for legalizing
-//             this SDNode. This can be `-1`, in which case the return type of
-//             the SDNode is used.
-#define BEGIN_REGISTER_VP(INTRIN, MASKPOS, EVLPOS, SDOPC, LEGALPOS) \
-BEGIN_REGISTER_VP_INTRINSIC(INTRIN, MASKPOS, EVLPOS) \
-BEGIN_REGISTER_VP_SDNODE(SDOPC, LEGALPOS, INTRIN, MASKPOS, EVLPOS)
-
-#define END_REGISTER_VP(INTRIN, SDOPC) \
-END_REGISTER_VP_INTRINSIC(INTRIN) \
-END_REGISTER_VP_SDNODE(SDOPC)
-
-
-// The following macros attach properties to the scope they are placed in. This
-// assigns the property to the VP Intrinsic and/or SDNode that belongs to the
-// scope.
-//
-// Property Macros {
-
-// The intrinsic and/or SDNode has the same function as this LLVM IR Opcode.
-// \p OPC  The standard IR opcode.
-#ifndef HANDLE_VP_TO_OPC
-#define HANDLE_VP_TO_OPC(OPC)
-#endif
-
-/// } Property Macros
-
-///// Integer Arithmetic {
-
-// Specialized helper macro for integer binary operators (%x, %y, %mask, %evl).
-#ifdef HELPER_REGISTER_BINARY_INT_VP
-#error "The internal helper macro HELPER_REGISTER_BINARY_INT_VP is already defined!"
-#endif
-#define HELPER_REGISTER_BINARY_INT_VP(INTRIN, SDOPC, OPC) \
-BEGIN_REGISTER_VP(INTRIN, 2, 3, SDOPC, -1) \
-HANDLE_VP_TO_OPC(OPC) \
-END_REGISTER_VP(INTRIN, SDOPC)
-
-
-
+// Register a new VP SDNode and begin its property scope. 
+// When the SDNode scope is nested within a VP intrinsic scope, it is implicitly registered as the canonical SDNode for this VP intrinsic. 
+// There is one VP intrinsic that maps directly to one SDNode that goes by the 
+// same name.  Since the operands are also the same, we open the property 
+// scopes for both the VPIntrinsic and the SDNode at once. 
+// \p SDOPC     The SelectionDAG Node id (eg VP_ADD). 
+// \p LEGALPOS The operand position of the SDNode that is used for legalizing 
+//             this SDNode. This can be `-1`, in which case the return type of 
+//             the SDNode is used. 
+// \p TDNAME   The name of the TableGen definition of this SDNode. 
+// \p MASKPOS  The mask operand position. 
+// \p EVLPOS   The explicit vector length operand position. 
+#ifndef BEGIN_REGISTER_VP_SDNODE 
+#define BEGIN_REGISTER_VP_SDNODE(SDOPC, LEGALPOS, TDNAME, MASKPOS, EVLPOS) 
+#endif 
+
+// End the property scope of a new VP SDNode. 
+#ifndef END_REGISTER_VP_SDNODE 
+#define END_REGISTER_VP_SDNODE(SDOPC) 
+#endif 
+ 
+// Helper macros for the common "1:1 - Intrinsic : SDNode" case. 
+// 
+// There is one VP intrinsic that maps directly to one SDNode that goes by the 
+// same name.  Since the operands are also the same, we open the property 
+// scopes for both the VPIntrinsic and the SDNode at once. 
+// 
+// \p INTRIN   The canonical name (eg `vp_add`, which at the same time is the 
+//             name of the intrinsic and the TableGen def of the SDNode). 
+// \p MASKPOS  The mask operand position. 
+// \p EVLPOS   The explicit vector length operand position. 
+// \p SDOPC    The SelectionDAG Node id (eg VP_ADD). 
+// \p LEGALPOS The operand position of the SDNode that is used for legalizing 
+//             this SDNode. This can be `-1`, in which case the return type of 
+//             the SDNode is used. 
+#define BEGIN_REGISTER_VP(INTRIN, MASKPOS, EVLPOS, SDOPC, LEGALPOS) \ 
+BEGIN_REGISTER_VP_INTRINSIC(INTRIN, MASKPOS, EVLPOS) \ 
+BEGIN_REGISTER_VP_SDNODE(SDOPC, LEGALPOS, INTRIN, MASKPOS, EVLPOS) 
+ 
+#define END_REGISTER_VP(INTRIN, SDOPC) \ 
+END_REGISTER_VP_INTRINSIC(INTRIN) \ 
+END_REGISTER_VP_SDNODE(SDOPC) 
+ 
+ 
+// The following macros attach properties to the scope they are placed in. This 
+// assigns the property to the VP Intrinsic and/or SDNode that belongs to the 
+// scope. 
+// 
+// Property Macros { 
+ 
+// The intrinsic and/or SDNode has the same function as this LLVM IR Opcode. 
+// \p OPC  The standard IR opcode. 
+#ifndef HANDLE_VP_TO_OPC 
+#define HANDLE_VP_TO_OPC(OPC) 
+#endif 
+ 
+/// } Property Macros 
+ 
+///// Integer Arithmetic { 
+ 
+// Specialized helper macro for integer binary operators (%x, %y, %mask, %evl). 
+#ifdef HELPER_REGISTER_BINARY_INT_VP 
+#error "The internal helper macro HELPER_REGISTER_BINARY_INT_VP is already defined!" 
+#endif 
+#define HELPER_REGISTER_BINARY_INT_VP(INTRIN, SDOPC, OPC) \ 
+BEGIN_REGISTER_VP(INTRIN, 2, 3, SDOPC, -1) \ 
+HANDLE_VP_TO_OPC(OPC) \ 
+END_REGISTER_VP(INTRIN, SDOPC) 
+ 
+ 
+ 
 // llvm.vp.add(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_add, VP_ADD, Add)
+HELPER_REGISTER_BINARY_INT_VP(vp_add, VP_ADD, Add) 
 
 // llvm.vp.and(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_and, VP_AND, And)
+HELPER_REGISTER_BINARY_INT_VP(vp_and, VP_AND, And) 
 
 // llvm.vp.ashr(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_ashr, VP_ASHR, AShr)
+HELPER_REGISTER_BINARY_INT_VP(vp_ashr, VP_ASHR, AShr) 
 
 // llvm.vp.lshr(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_lshr, VP_LSHR, LShr)
+HELPER_REGISTER_BINARY_INT_VP(vp_lshr, VP_LSHR, LShr) 
 
 // llvm.vp.mul(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_mul, VP_MUL, Mul)
+HELPER_REGISTER_BINARY_INT_VP(vp_mul, VP_MUL, Mul) 
 
 // llvm.vp.or(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_or, VP_OR, Or)
+HELPER_REGISTER_BINARY_INT_VP(vp_or, VP_OR, Or) 
 
 // llvm.vp.sdiv(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_sdiv, VP_SDIV, SDiv)
+HELPER_REGISTER_BINARY_INT_VP(vp_sdiv, VP_SDIV, SDiv) 
 
 // llvm.vp.shl(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_shl, VP_SHL, Shl)
+HELPER_REGISTER_BINARY_INT_VP(vp_shl, VP_SHL, Shl) 
 
 // llvm.vp.srem(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_srem, VP_SREM, SRem)
+HELPER_REGISTER_BINARY_INT_VP(vp_srem, VP_SREM, SRem) 
 
 // llvm.vp.sub(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_sub, VP_SUB, Sub)
+HELPER_REGISTER_BINARY_INT_VP(vp_sub, VP_SUB, Sub) 
 
 // llvm.vp.udiv(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_udiv, VP_UDIV, UDiv)
+HELPER_REGISTER_BINARY_INT_VP(vp_udiv, VP_UDIV, UDiv) 
 
 // llvm.vp.urem(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_urem, VP_UREM, URem)
+HELPER_REGISTER_BINARY_INT_VP(vp_urem, VP_UREM, URem) 
 
 // llvm.vp.xor(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_xor, VP_XOR, Xor)
-
-#undef HELPER_REGISTER_BINARY_INT_VP
-
-///// } Integer Arithmetic
-
-
-#undef BEGIN_REGISTER_VP
-#undef BEGIN_REGISTER_VP_INTRINSIC
-#undef BEGIN_REGISTER_VP_SDNODE
-#undef END_REGISTER_VP
-#undef END_REGISTER_VP_INTRINSIC
-#undef END_REGISTER_VP_SDNODE
-#undef HANDLE_VP_TO_OPC
+HELPER_REGISTER_BINARY_INT_VP(vp_xor, VP_XOR, Xor) 
+
+#undef HELPER_REGISTER_BINARY_INT_VP 
+ 
+///// } Integer Arithmetic 
+ 
+ 
+#undef BEGIN_REGISTER_VP 
+#undef BEGIN_REGISTER_VP_INTRINSIC 
+#undef BEGIN_REGISTER_VP_SDNODE 
+#undef END_REGISTER_VP 
+#undef END_REGISTER_VP_INTRINSIC 
+#undef END_REGISTER_VP_SDNODE 
+#undef HANDLE_VP_TO_OPC