Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.

1 files changed, 169 insertions, 169 deletions

diff --git a/contrib/libs/llvm12/include/llvm/IR/IntrinsicsWebAssembly.td b/contrib/libs/llvm12/include/llvm/IR/IntrinsicsWebAssembly.td
index d306d0ccb9..dccc0ca3b4 100644
--- a/contrib/libs/llvm12/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/contrib/libs/llvm12/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -50,10 +50,10 @@ def int_wasm_trunc_saturate_unsigned : Intrinsic<[llvm_anyint_ty],
 //===----------------------------------------------------------------------===//
 
 // throw / rethrow
-// The immediate argument is an index to a tag, which is 0 for C++.
+// The immediate argument is an index to a tag, which is 0 for C++. 
 def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
                                [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
-def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
+def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>; 
 
 // Since wasm does not use landingpad instructions, these instructions return
 // exception pointer and selector values until we lower them in WasmEHPrepare.
@@ -62,12 +62,12 @@ def int_wasm_get_exception : Intrinsic<[llvm_ptr_ty], [llvm_token_ty],
 def int_wasm_get_ehselector : Intrinsic<[llvm_i32_ty], [llvm_token_ty],
                                         [IntrHasSideEffects]>;
 
-// wasm.catch returns the pointer to the exception object caught by wasm 'catch'
-// instruction. This returns a single pointer, which is sufficient for C++
-// support. The immediate argument is an index to for a tag, which is 0 for C++.
-def int_wasm_catch : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty],
-                               [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
-
+// wasm.catch returns the pointer to the exception object caught by wasm 'catch' 
+// instruction. This returns a single pointer, which is sufficient for C++ 
+// support. The immediate argument is an index to for a tag, which is 0 for C++. 
+def int_wasm_catch : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], 
+                               [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>; 
+ 
 // WebAssembly EH must maintain the landingpads in the order assigned to them
 // by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
 // used in order to give them the indices in WasmEHPrepare.
@@ -82,23 +82,23 @@ def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
 //===----------------------------------------------------------------------===//
 
 // wait / notify
-def int_wasm_memory_atomic_wait32 :
+def int_wasm_memory_atomic_wait32 : 
   Intrinsic<[llvm_i32_ty],
             [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
-            [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
-             NoCapture<ArgIndex<0>>, IntrHasSideEffects],
-            "", [SDNPMemOperand]>;
-def int_wasm_memory_atomic_wait64 :
+            [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, 
+             NoCapture<ArgIndex<0>>, IntrHasSideEffects], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_memory_atomic_wait64 : 
   Intrinsic<[llvm_i32_ty],
             [LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
-            [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
-             NoCapture<ArgIndex<0>>, IntrHasSideEffects],
-            "", [SDNPMemOperand]>;
-def int_wasm_memory_atomic_notify:
-  Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
-            [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
+            [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, 
+             NoCapture<ArgIndex<0>>, IntrHasSideEffects], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_memory_atomic_notify: 
+  Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty], 
+            [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>, 
              IntrHasSideEffects],
-            "", [SDNPMemOperand]>;
+            "", [SDNPMemOperand]>; 
 
 //===----------------------------------------------------------------------===//
 // SIMD intrinsics
@@ -155,7 +155,7 @@ def int_wasm_dot :
   Intrinsic<[llvm_v4i32_ty],
             [llvm_v8i16_ty, llvm_v8i16_ty],
             [IntrNoMem, IntrSpeculatable]>;
-
+ 
 def int_wasm_narrow_signed :
   Intrinsic<[llvm_anyvector_ty],
             [llvm_anyvector_ty, LLVMMatchType<1>],
@@ -164,21 +164,21 @@ def int_wasm_narrow_unsigned :
   Intrinsic<[llvm_anyvector_ty],
             [llvm_anyvector_ty, LLVMMatchType<1>],
             [IntrNoMem, IntrSpeculatable]>;
-
-// TODO: Replace these intrinsics with normal ISel patterns once i32x4 to i64x2
-// widening is merged to the proposal.
+ 
+// TODO: Replace these intrinsics with normal ISel patterns once i32x4 to i64x2 
+// widening is merged to the proposal. 
 def int_wasm_widen_low_signed :
-  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>;
+  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; 
 def int_wasm_widen_high_signed :
-  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>;
+  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; 
 def int_wasm_widen_low_unsigned :
-  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>;
+  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; 
 def int_wasm_widen_high_unsigned :
-  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>;
-
-def int_wasm_q15mulr_saturate_signed :
-  Intrinsic<[llvm_v8i16_ty],
-            [llvm_v8i16_ty, llvm_v8i16_ty],
+  Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; 
+ 
+def int_wasm_q15mulr_saturate_signed : 
+  Intrinsic<[llvm_v8i16_ty], 
+            [llvm_v8i16_ty, llvm_v8i16_ty], 
             [IntrNoMem, IntrSpeculatable]>;
 
 // TODO: Replace these intrinsics with normal ISel patterns
@@ -211,143 +211,143 @@ def int_wasm_nearest :
             [LLVMMatchType<0>],
             [IntrNoMem, IntrSpeculatable]>;
 
-// TODO: Replace these intrinsic with normal ISel patterns once the
-// load_zero instructions are merged to the proposal.
-def int_wasm_load32_zero :
-  Intrinsic<[llvm_v4i32_ty],
-            [LLVMPointerType<llvm_i32_ty>],
-            [IntrReadMem, IntrArgMemOnly],
-             "", [SDNPMemOperand]>;
-
-def int_wasm_load64_zero :
-  Intrinsic<[llvm_v2i64_ty],
-            [LLVMPointerType<llvm_i64_ty>],
-            [IntrReadMem, IntrArgMemOnly],
-             "", [SDNPMemOperand]>;
-
-// These intrinsics do not mark their lane index arguments as immediate because
-// that changes the corresponding SDNode from ISD::Constant to
-// ISD::TargetConstant, which would require extra complications in the ISel
-// tablegen patterns. TODO: Replace these intrinsic with normal ISel patterns
-// once the load_lane instructions are merged to the proposal.
-def int_wasm_load8_lane :
-  Intrinsic<[llvm_v16i8_ty],
-            [LLVMPointerType<llvm_i8_ty>, llvm_v16i8_ty, llvm_i32_ty],
-            [IntrReadMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_load16_lane :
-  Intrinsic<[llvm_v8i16_ty],
-            [LLVMPointerType<llvm_i16_ty>, llvm_v8i16_ty, llvm_i32_ty],
-            [IntrReadMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_load32_lane :
-  Intrinsic<[llvm_v4i32_ty],
-            [LLVMPointerType<llvm_i32_ty>, llvm_v4i32_ty, llvm_i32_ty],
-            [IntrReadMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_load64_lane :
-  Intrinsic<[llvm_v2i64_ty],
-            [LLVMPointerType<llvm_i64_ty>, llvm_v2i64_ty, llvm_i32_ty],
-            [IntrReadMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_store8_lane :
-  Intrinsic<[],
-            [LLVMPointerType<llvm_i8_ty>, llvm_v16i8_ty, llvm_i32_ty],
-            [IntrWriteMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_store16_lane :
-  Intrinsic<[],
-            [LLVMPointerType<llvm_i16_ty>, llvm_v8i16_ty, llvm_i32_ty],
-            [IntrWriteMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_store32_lane :
-  Intrinsic<[],
-            [LLVMPointerType<llvm_i32_ty>, llvm_v4i32_ty, llvm_i32_ty],
-            [IntrWriteMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-def int_wasm_store64_lane :
-  Intrinsic<[],
-            [LLVMPointerType<llvm_i64_ty>, llvm_v2i64_ty, llvm_i32_ty],
-            [IntrWriteMem, IntrArgMemOnly],
-            "", [SDNPMemOperand]>;
-
-// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
-// to the proposal.
-def int_wasm_popcnt :
-  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>;
-
-def int_wasm_extmul_low_signed :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_extmul_high_signed :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_extmul_low_unsigned :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_extmul_high_unsigned :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-
-def int_wasm_extadd_pairwise_signed :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_extadd_pairwise_unsigned :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMSubdivide2VectorType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-
-def int_wasm_signselect :
-  Intrinsic<[llvm_anyvector_ty],
-            [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
-            [IntrNoMem, IntrSpeculatable]>;
-
-// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets
-// merged to the proposal.
-def int_wasm_eq :
-  Intrinsic<[llvm_v2i64_ty],
-            [llvm_v2i64_ty, llvm_v2i64_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-
-// TODO: Remove this after experiments have been run. Use the target-agnostic
-// int_prefetch if this becomes specified at some point.
-def int_wasm_prefetch_t :
-  Intrinsic<[], [llvm_ptr_ty],
-            [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
-             ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
-            "", [SDNPMemOperand]>;
-
-def int_wasm_prefetch_nt :
-  Intrinsic<[], [llvm_ptr_ty],
-            [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
-             ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
-            "", [SDNPMemOperand]>;
-
-// TODO: Remove these if possible if they are merged to the spec.
-def int_wasm_convert_low_signed :
-  Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_convert_low_unsigned :
-  Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_trunc_saturate_zero_signed :
-  Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_trunc_saturate_zero_unsigned :
-  Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_demote_zero :
-  Intrinsic<[llvm_v4f32_ty], [llvm_v2f64_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_promote_low :
-  Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty],
-            [IntrNoMem, IntrSpeculatable]>;
-
+// TODO: Replace these intrinsic with normal ISel patterns once the 
+// load_zero instructions are merged to the proposal. 
+def int_wasm_load32_zero : 
+  Intrinsic<[llvm_v4i32_ty], 
+            [LLVMPointerType<llvm_i32_ty>], 
+            [IntrReadMem, IntrArgMemOnly], 
+             "", [SDNPMemOperand]>; 
+ 
+def int_wasm_load64_zero : 
+  Intrinsic<[llvm_v2i64_ty], 
+            [LLVMPointerType<llvm_i64_ty>], 
+            [IntrReadMem, IntrArgMemOnly], 
+             "", [SDNPMemOperand]>; 
+ 
+// These intrinsics do not mark their lane index arguments as immediate because 
+// that changes the corresponding SDNode from ISD::Constant to 
+// ISD::TargetConstant, which would require extra complications in the ISel 
+// tablegen patterns. TODO: Replace these intrinsic with normal ISel patterns 
+// once the load_lane instructions are merged to the proposal. 
+def int_wasm_load8_lane : 
+  Intrinsic<[llvm_v16i8_ty], 
+            [LLVMPointerType<llvm_i8_ty>, llvm_v16i8_ty, llvm_i32_ty], 
+            [IntrReadMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_load16_lane : 
+  Intrinsic<[llvm_v8i16_ty], 
+            [LLVMPointerType<llvm_i16_ty>, llvm_v8i16_ty, llvm_i32_ty], 
+            [IntrReadMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_load32_lane : 
+  Intrinsic<[llvm_v4i32_ty], 
+            [LLVMPointerType<llvm_i32_ty>, llvm_v4i32_ty, llvm_i32_ty], 
+            [IntrReadMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_load64_lane : 
+  Intrinsic<[llvm_v2i64_ty], 
+            [LLVMPointerType<llvm_i64_ty>, llvm_v2i64_ty, llvm_i32_ty], 
+            [IntrReadMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_store8_lane : 
+  Intrinsic<[], 
+            [LLVMPointerType<llvm_i8_ty>, llvm_v16i8_ty, llvm_i32_ty], 
+            [IntrWriteMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_store16_lane : 
+  Intrinsic<[], 
+            [LLVMPointerType<llvm_i16_ty>, llvm_v8i16_ty, llvm_i32_ty], 
+            [IntrWriteMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_store32_lane : 
+  Intrinsic<[], 
+            [LLVMPointerType<llvm_i32_ty>, llvm_v4i32_ty, llvm_i32_ty], 
+            [IntrWriteMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+def int_wasm_store64_lane : 
+  Intrinsic<[], 
+            [LLVMPointerType<llvm_i64_ty>, llvm_v2i64_ty, llvm_i32_ty], 
+            [IntrWriteMem, IntrArgMemOnly], 
+            "", [SDNPMemOperand]>; 
+ 
+// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged 
+// to the proposal. 
+def int_wasm_popcnt : 
+  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>; 
+ 
+def int_wasm_extmul_low_signed : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_extmul_high_signed : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_extmul_low_unsigned : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_extmul_high_unsigned : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+ 
+def int_wasm_extadd_pairwise_signed : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_extadd_pairwise_unsigned : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMSubdivide2VectorType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+ 
+def int_wasm_signselect : 
+  Intrinsic<[llvm_anyvector_ty], 
+            [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], 
+            [IntrNoMem, IntrSpeculatable]>; 
+ 
+// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets 
+// merged to the proposal. 
+def int_wasm_eq : 
+  Intrinsic<[llvm_v2i64_ty], 
+            [llvm_v2i64_ty, llvm_v2i64_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+ 
+// TODO: Remove this after experiments have been run. Use the target-agnostic 
+// int_prefetch if this becomes specified at some point. 
+def int_wasm_prefetch_t : 
+  Intrinsic<[], [llvm_ptr_ty], 
+            [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn, 
+             ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>], 
+            "", [SDNPMemOperand]>; 
+ 
+def int_wasm_prefetch_nt : 
+  Intrinsic<[], [llvm_ptr_ty], 
+            [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn, 
+             ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>], 
+            "", [SDNPMemOperand]>; 
+ 
+// TODO: Remove these if possible if they are merged to the spec. 
+def int_wasm_convert_low_signed : 
+  Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_convert_low_unsigned : 
+  Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_trunc_saturate_zero_signed : 
+  Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_trunc_saturate_zero_unsigned : 
+  Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_demote_zero : 
+  Intrinsic<[llvm_v4f32_ty], [llvm_v2f64_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+def int_wasm_promote_low : 
+  Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty], 
+            [IntrNoMem, IntrSpeculatable]>; 
+ 
 //===----------------------------------------------------------------------===//
 // Thread-local storage intrinsics
 //===----------------------------------------------------------------------===//