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authorshadchin <shadchin@yandex-team.ru>2022-02-10 16:44:30 +0300
committerDaniil Cherednik <dcherednik@yandex-team.ru>2022-02-10 16:44:30 +0300
commit2598ef1d0aee359b4b6d5fdd1758916d5907d04f (patch)
tree012bb94d777798f1f56ac1cec429509766d05181 /contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h
parent6751af0b0c1b952fede40b19b71da8025b5d8bcf (diff)
downloadydb-2598ef1d0aee359b4b6d5fdd1758916d5907d04f.tar.gz
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.
Diffstat (limited to 'contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h')
-rw-r--r--contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h74
1 files changed, 37 insertions, 37 deletions
diff --git a/contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h b/contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h
index f0f53003c4..7dbbda8971 100644
--- a/contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h
+++ b/contrib/libs/llvm12/include/llvm/CodeGen/MachineInstr.h
@@ -256,10 +256,10 @@ private:
DebugLoc debugLoc; // Source line information.
- /// Unique instruction number. Used by DBG_INSTR_REFs to refer to the values
- /// defined by this instruction.
- unsigned DebugInstrNum;
-
+ /// Unique instruction number. Used by DBG_INSTR_REFs to refer to the values
+ /// defined by this instruction.
+ unsigned DebugInstrNum;
+
// Intrusive list support
friend struct ilist_traits<MachineInstr>;
friend struct ilist_callback_traits<MachineBasicBlock>;
@@ -291,9 +291,9 @@ public:
const MachineBasicBlock* getParent() const { return Parent; }
MachineBasicBlock* getParent() { return Parent; }
- /// Move the instruction before \p MovePos.
- void moveBefore(MachineInstr *MovePos);
-
+ /// Move the instruction before \p MovePos.
+ void moveBefore(MachineInstr *MovePos);
+
/// Return the function that contains the basic block that this instruction
/// belongs to.
///
@@ -455,18 +455,18 @@ public:
/// this DBG_LABEL instruction.
const DILabel *getDebugLabel() const;
- /// Fetch the instruction number of this MachineInstr. If it does not have
- /// one already, a new and unique number will be assigned.
- unsigned getDebugInstrNum();
-
- /// Examine the instruction number of this MachineInstr. May be zero if
- /// it hasn't been assigned a number yet.
- unsigned peekDebugInstrNum() const { return DebugInstrNum; }
-
- /// Set instruction number of this MachineInstr. Avoid using unless you're
- /// deserializing this information.
- void setDebugInstrNum(unsigned Num) { DebugInstrNum = Num; }
-
+ /// Fetch the instruction number of this MachineInstr. If it does not have
+ /// one already, a new and unique number will be assigned.
+ unsigned getDebugInstrNum();
+
+ /// Examine the instruction number of this MachineInstr. May be zero if
+ /// it hasn't been assigned a number yet.
+ unsigned peekDebugInstrNum() const { return DebugInstrNum; }
+
+ /// Set instruction number of this MachineInstr. Avoid using unless you're
+ /// deserializing this information.
+ void setDebugInstrNum(unsigned Num) { DebugInstrNum = Num; }
+
/// Emit an error referring to the source location of this instruction.
/// This should only be used for inline assembly that is somehow
/// impossible to compile. Other errors should have been handled much
@@ -1163,22 +1163,22 @@ public:
return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
}
- bool isPseudoProbe() const {
- return getOpcode() == TargetOpcode::PSEUDO_PROBE;
- }
-
+ bool isPseudoProbe() const {
+ return getOpcode() == TargetOpcode::PSEUDO_PROBE;
+ }
+
// True if the instruction represents a position in the function.
bool isPosition() const { return isLabel() || isCFIInstruction(); }
bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; }
bool isDebugLabel() const { return getOpcode() == TargetOpcode::DBG_LABEL; }
- bool isDebugRef() const { return getOpcode() == TargetOpcode::DBG_INSTR_REF; }
- bool isDebugInstr() const {
- return isDebugValue() || isDebugLabel() || isDebugRef();
- }
- bool isDebugOrPseudoInstr() const {
- return isDebugInstr() || isPseudoProbe();
- }
+ bool isDebugRef() const { return getOpcode() == TargetOpcode::DBG_INSTR_REF; }
+ bool isDebugInstr() const {
+ return isDebugValue() || isDebugLabel() || isDebugRef();
+ }
+ bool isDebugOrPseudoInstr() const {
+ return isDebugInstr() || isPseudoProbe();
+ }
bool isDebugOffsetImm() const { return getDebugOffset().isImm(); }
@@ -1271,11 +1271,11 @@ public:
case TargetOpcode::EH_LABEL:
case TargetOpcode::GC_LABEL:
case TargetOpcode::DBG_VALUE:
- case TargetOpcode::DBG_INSTR_REF:
+ case TargetOpcode::DBG_INSTR_REF:
case TargetOpcode::DBG_LABEL:
case TargetOpcode::LIFETIME_START:
case TargetOpcode::LIFETIME_END:
- case TargetOpcode::PSEUDO_PROBE:
+ case TargetOpcode::PSEUDO_PROBE:
return true;
}
}
@@ -1348,8 +1348,8 @@ public:
/// Return true if the MachineInstr modifies (fully define or partially
/// define) the specified register.
/// NOTE: It's ignoring subreg indices on virtual registers.
- bool modifiesRegister(Register Reg,
- const TargetRegisterInfo *TRI = nullptr) const {
+ bool modifiesRegister(Register Reg,
+ const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1;
}
@@ -1800,10 +1800,10 @@ public:
void setDebugValueUndef() {
assert(isDebugValue() && "Must be a debug value instruction.");
for (MachineOperand &MO : debug_operands()) {
- if (MO.isReg()) {
+ if (MO.isReg()) {
MO.setReg(0);
- MO.setSubReg(0);
- }
+ MO.setSubReg(0);
+ }
}
}