Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 2 of 2.

1 files changed, 105 insertions, 105 deletions

diff --git a/contrib/libs/llvm12/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h b/contrib/libs/llvm12/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
index 0d476efb2c..9bed6d039e 100644
--- a/contrib/libs/llvm12/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
+++ b/contrib/libs/llvm12/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
@@ -112,23 +112,23 @@ public:
     Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
 
     // zext(trunc x) - > and (aext/copy/trunc x), mask
-    // zext(sext x) -> and (sext x), mask 
+    // zext(sext x) -> and (sext x), mask
     Register TruncSrc;
-    Register SextSrc; 
-    if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc))) || 
-        mi_match(SrcReg, MRI, m_GSExt(m_Reg(SextSrc)))) { 
+    Register SextSrc;
+    if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc))) ||
+        mi_match(SrcReg, MRI, m_GSExt(m_Reg(SextSrc)))) {
       LLT DstTy = MRI.getType(DstReg);
       if (isInstUnsupported({TargetOpcode::G_AND, {DstTy}}) ||
           isConstantUnsupported(DstTy))
         return false;
       LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
       LLT SrcTy = MRI.getType(SrcReg);
-      APInt MaskVal = APInt::getAllOnesValue(SrcTy.getScalarSizeInBits()); 
-      auto Mask = Builder.buildConstant( 
-        DstTy, MaskVal.zext(DstTy.getScalarSizeInBits())); 
-      auto Extended = SextSrc ? Builder.buildSExtOrTrunc(DstTy, SextSrc) : 
-                                Builder.buildAnyExtOrTrunc(DstTy, TruncSrc); 
-      Builder.buildAnd(DstReg, Extended, Mask); 
+      APInt MaskVal = APInt::getAllOnesValue(SrcTy.getScalarSizeInBits());
+      auto Mask = Builder.buildConstant(
+        DstTy, MaskVal.zext(DstTy.getScalarSizeInBits()));
+      auto Extended = SextSrc ? Builder.buildSExtOrTrunc(DstTy, SextSrc) :
+                                Builder.buildAnyExtOrTrunc(DstTy, TruncSrc);
+      Builder.buildAnd(DstReg, Extended, Mask);
       markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
       return true;
     }
@@ -493,7 +493,7 @@ public:
                                     MachineRegisterInfo &MRI,
                                     MachineIRBuilder &Builder,
                                     SmallVectorImpl<Register> &UpdatedDefs,
-                                    GISelChangeObserver &Observer) { 
+                                    GISelChangeObserver &Observer) {
     if (!llvm::canReplaceReg(DstReg, SrcReg, MRI)) {
       Builder.buildCopy(DstReg, SrcReg);
       UpdatedDefs.push_back(DstReg);
@@ -513,78 +513,78 @@ public:
       Observer.changedInstr(*UseMI);
   }
 
-  /// Return the operand index in \p MI that defines \p Def 
-  static unsigned getDefIndex(const MachineInstr &MI, Register SearchDef) { 
-    unsigned DefIdx = 0; 
-    for (const MachineOperand &Def : MI.defs()) { 
-      if (Def.getReg() == SearchDef) 
-        break; 
-      ++DefIdx; 
-    } 
- 
-    return DefIdx; 
-  } 
- 
-  bool tryCombineUnmergeValues(MachineInstr &MI, 
-                               SmallVectorImpl<MachineInstr *> &DeadInsts, 
-                               SmallVectorImpl<Register> &UpdatedDefs, 
-                               GISelChangeObserver &Observer) { 
+  /// Return the operand index in \p MI that defines \p Def
+  static unsigned getDefIndex(const MachineInstr &MI, Register SearchDef) {
+    unsigned DefIdx = 0;
+    for (const MachineOperand &Def : MI.defs()) {
+      if (Def.getReg() == SearchDef)
+        break;
+      ++DefIdx;
+    }
+
+    return DefIdx;
+  }
+
+  bool tryCombineUnmergeValues(MachineInstr &MI,
+                               SmallVectorImpl<MachineInstr *> &DeadInsts,
+                               SmallVectorImpl<Register> &UpdatedDefs,
+                               GISelChangeObserver &Observer) {
     assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES);
 
     unsigned NumDefs = MI.getNumOperands() - 1;
-    Register SrcReg = MI.getOperand(NumDefs).getReg(); 
-    MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI); 
+    Register SrcReg = MI.getOperand(NumDefs).getReg();
+    MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI);
     if (!SrcDef)
       return false;
 
     LLT OpTy = MRI.getType(MI.getOperand(NumDefs).getReg());
     LLT DestTy = MRI.getType(MI.getOperand(0).getReg());
- 
-    if (SrcDef->getOpcode() == TargetOpcode::G_UNMERGE_VALUES) { 
-      // %0:_(<4 x s16>) = G_FOO 
-      // %1:_(<2 x s16>), %2:_(<2 x s16>) = G_UNMERGE_VALUES %0 
-      // %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %1 
-      // 
-      // %3:_(s16), %4:_(s16), %5:_(s16), %6:_(s16) = G_UNMERGE_VALUES %0 
-      const unsigned NumSrcOps = SrcDef->getNumOperands(); 
-      Register SrcUnmergeSrc = SrcDef->getOperand(NumSrcOps - 1).getReg(); 
-      LLT SrcUnmergeSrcTy = MRI.getType(SrcUnmergeSrc); 
- 
-      // If we need to decrease the number of vector elements in the result type 
-      // of an unmerge, this would involve the creation of an equivalent unmerge 
-      // to copy back to the original result registers. 
-      LegalizeActionStep ActionStep = LI.getAction( 
-          {TargetOpcode::G_UNMERGE_VALUES, {OpTy, SrcUnmergeSrcTy}}); 
-      switch (ActionStep.Action) { 
-      case LegalizeActions::Lower: 
-      case LegalizeActions::Unsupported: 
-        break; 
-      case LegalizeActions::FewerElements: 
-      case LegalizeActions::NarrowScalar: 
-        if (ActionStep.TypeIdx == 1) 
-          return false; 
-        break; 
-      default: 
-        return false; 
-      } 
- 
-      Builder.setInstrAndDebugLoc(MI); 
-      auto NewUnmerge = Builder.buildUnmerge(DestTy, SrcUnmergeSrc); 
- 
-      // TODO: Should we try to process out the other defs now? If the other 
-      // defs of the source unmerge are also unmerged, we end up with a separate 
-      // unmerge for each one. 
-      unsigned SrcDefIdx = getDefIndex(*SrcDef, SrcReg); 
-      for (unsigned I = 0; I != NumDefs; ++I) { 
-        Register Def = MI.getOperand(I).getReg(); 
-        replaceRegOrBuildCopy(Def, NewUnmerge.getReg(SrcDefIdx * NumDefs + I), 
-                              MRI, Builder, UpdatedDefs, Observer); 
-      } 
- 
-      markInstAndDefDead(MI, *SrcDef, DeadInsts, SrcDefIdx); 
-      return true; 
-    } 
- 
+
+    if (SrcDef->getOpcode() == TargetOpcode::G_UNMERGE_VALUES) {
+      // %0:_(<4 x s16>) = G_FOO
+      // %1:_(<2 x s16>), %2:_(<2 x s16>) = G_UNMERGE_VALUES %0
+      // %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %1
+      //
+      // %3:_(s16), %4:_(s16), %5:_(s16), %6:_(s16) = G_UNMERGE_VALUES %0
+      const unsigned NumSrcOps = SrcDef->getNumOperands();
+      Register SrcUnmergeSrc = SrcDef->getOperand(NumSrcOps - 1).getReg();
+      LLT SrcUnmergeSrcTy = MRI.getType(SrcUnmergeSrc);
+
+      // If we need to decrease the number of vector elements in the result type
+      // of an unmerge, this would involve the creation of an equivalent unmerge
+      // to copy back to the original result registers.
+      LegalizeActionStep ActionStep = LI.getAction(
+          {TargetOpcode::G_UNMERGE_VALUES, {OpTy, SrcUnmergeSrcTy}});
+      switch (ActionStep.Action) {
+      case LegalizeActions::Lower:
+      case LegalizeActions::Unsupported:
+        break;
+      case LegalizeActions::FewerElements:
+      case LegalizeActions::NarrowScalar:
+        if (ActionStep.TypeIdx == 1)
+          return false;
+        break;
+      default:
+        return false;
+      }
+
+      Builder.setInstrAndDebugLoc(MI);
+      auto NewUnmerge = Builder.buildUnmerge(DestTy, SrcUnmergeSrc);
+
+      // TODO: Should we try to process out the other defs now? If the other
+      // defs of the source unmerge are also unmerged, we end up with a separate
+      // unmerge for each one.
+      unsigned SrcDefIdx = getDefIndex(*SrcDef, SrcReg);
+      for (unsigned I = 0; I != NumDefs; ++I) {
+        Register Def = MI.getOperand(I).getReg();
+        replaceRegOrBuildCopy(Def, NewUnmerge.getReg(SrcDefIdx * NumDefs + I),
+                              MRI, Builder, UpdatedDefs, Observer);
+      }
+
+      markInstAndDefDead(MI, *SrcDef, DeadInsts, SrcDefIdx);
+      return true;
+    }
+
     MachineInstr *MergeI = SrcDef;
     unsigned ConvertOp = 0;
 
@@ -812,12 +812,12 @@ public:
       Changed = tryCombineSExt(MI, DeadInsts, UpdatedDefs);
       break;
     case TargetOpcode::G_UNMERGE_VALUES:
-      Changed = 
-          tryCombineUnmergeValues(MI, DeadInsts, UpdatedDefs, WrapperObserver); 
+      Changed =
+          tryCombineUnmergeValues(MI, DeadInsts, UpdatedDefs, WrapperObserver);
       break;
     case TargetOpcode::G_MERGE_VALUES:
-    case TargetOpcode::G_BUILD_VECTOR: 
-    case TargetOpcode::G_CONCAT_VECTORS: 
+    case TargetOpcode::G_BUILD_VECTOR:
+    case TargetOpcode::G_CONCAT_VECTORS:
       // If any of the users of this merge are an unmerge, then add them to the
       // artifact worklist in case there's folding that can be done looking up.
       for (MachineInstr &U : MRI.use_instructions(MI.getOperand(0).getReg())) {
@@ -901,8 +901,8 @@ private:
   /// dead.
   /// MI is not marked dead.
   void markDefDead(MachineInstr &MI, MachineInstr &DefMI,
-                   SmallVectorImpl<MachineInstr *> &DeadInsts, 
-                   unsigned DefIdx = 0) { 
+                   SmallVectorImpl<MachineInstr *> &DeadInsts,
+                   unsigned DefIdx = 0) {
     // Collect all the copy instructions that are made dead, due to deleting
     // this instruction. Collect all of them until the Trunc(DefMI).
     // Eg,
@@ -929,27 +929,27 @@ private:
         break;
       PrevMI = TmpDef;
     }
- 
-    if (PrevMI == &DefMI) { 
-      unsigned I = 0; 
-      bool IsDead = true; 
-      for (MachineOperand &Def : DefMI.defs()) { 
-        if (I != DefIdx) { 
-          if (!MRI.use_empty(Def.getReg())) { 
-            IsDead = false; 
-            break; 
-          } 
-        } else { 
-          if (!MRI.hasOneUse(DefMI.getOperand(DefIdx).getReg())) 
-            break; 
-        } 
- 
-        ++I; 
-      } 
- 
-      if (IsDead) 
-        DeadInsts.push_back(&DefMI); 
-    } 
+
+    if (PrevMI == &DefMI) {
+      unsigned I = 0;
+      bool IsDead = true;
+      for (MachineOperand &Def : DefMI.defs()) {
+        if (I != DefIdx) {
+          if (!MRI.use_empty(Def.getReg())) {
+            IsDead = false;
+            break;
+          }
+        } else {
+          if (!MRI.hasOneUse(DefMI.getOperand(DefIdx).getReg()))
+            break;
+        }
+
+        ++I;
+      }
+
+      if (IsDead)
+        DeadInsts.push_back(&DefMI);
+    }
   }
 
   /// Mark MI as dead. If a def of one of MI's operands, DefMI, would also be
@@ -958,10 +958,10 @@ private:
   /// copies in between the extends and the truncs, and this attempts to collect
   /// the in between copies if they're dead.
   void markInstAndDefDead(MachineInstr &MI, MachineInstr &DefMI,
-                          SmallVectorImpl<MachineInstr *> &DeadInsts, 
-                          unsigned DefIdx = 0) { 
+                          SmallVectorImpl<MachineInstr *> &DeadInsts,
+                          unsigned DefIdx = 0) {
     DeadInsts.push_back(&MI);
-    markDefDead(MI, DefMI, DeadInsts, DefIdx); 
+    markDefDead(MI, DefMI, DeadInsts, DefIdx);
   }
 
   /// Erase the dead instructions in the list and call the observer hooks.