diff options
author | robot-contrib <robot-contrib@yandex-team.com> | 2023-11-11 02:21:37 +0300 |
---|---|---|
committer | robot-contrib <robot-contrib@yandex-team.com> | 2023-11-11 02:40:39 +0300 |
commit | c9eb66546bc5c72ff6a4424f5c73ada67d0aeaa8 (patch) | |
tree | 4a18f83f5979766f6a360805a97500e9b2beeb75 /contrib/libs/linux-headers/linux/mdio.h | |
parent | 638336990198a7f36d43cfd21a42b25d9dcb6efc (diff) | |
download | ydb-c9eb66546bc5c72ff6a4424f5c73ada67d0aeaa8.tar.gz |
Update contrib/libs/linux-headers to 6.5.9
Diffstat (limited to 'contrib/libs/linux-headers/linux/mdio.h')
-rw-r--r-- | contrib/libs/linux-headers/linux/mdio.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/contrib/libs/linux-headers/linux/mdio.h b/contrib/libs/linux-headers/linux/mdio.h index f9afcd7a59..1178e90635 100644 --- a/contrib/libs/linux-headers/linux/mdio.h +++ b/contrib/libs/linux-headers/linux/mdio.h @@ -231,6 +231,30 @@ #define MDIO_PMA_EXTABLE_BT1 0x0800 /* BASE-T1 ability */ #define MDIO_PMA_EXTABLE_NBT 0x4000 /* 2.5/5GBASE-T ability */ +/* AN Clause 73 linkword */ +#define MDIO_AN_C73_0_S_MASK GENMASK(4, 0) +#define MDIO_AN_C73_0_E_MASK GENMASK(9, 5) +#define MDIO_AN_C73_0_PAUSE BIT(10) +#define MDIO_AN_C73_0_ASM_DIR BIT(11) +#define MDIO_AN_C73_0_C2 BIT(12) +#define MDIO_AN_C73_0_RF BIT(13) +#define MDIO_AN_C73_0_ACK BIT(14) +#define MDIO_AN_C73_0_NP BIT(15) +#define MDIO_AN_C73_1_T_MASK GENMASK(4, 0) +#define MDIO_AN_C73_1_1000BASE_KX BIT(5) +#define MDIO_AN_C73_1_10GBASE_KX4 BIT(6) +#define MDIO_AN_C73_1_10GBASE_KR BIT(7) +#define MDIO_AN_C73_1_40GBASE_KR4 BIT(8) +#define MDIO_AN_C73_1_40GBASE_CR4 BIT(9) +#define MDIO_AN_C73_1_100GBASE_CR10 BIT(10) +#define MDIO_AN_C73_1_100GBASE_KP4 BIT(11) +#define MDIO_AN_C73_1_100GBASE_KR4 BIT(12) +#define MDIO_AN_C73_1_100GBASE_CR4 BIT(13) +#define MDIO_AN_C73_1_25GBASE_R_S BIT(14) +#define MDIO_AN_C73_1_25GBASE_R BIT(15) +#define MDIO_AN_C73_2_2500BASE_KX BIT(0) +#define MDIO_AN_C73_2_5GBASE_KR BIT(1) + /* PHY XGXS lane state register. */ #define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 #define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 |