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authorDevtools Arcadia <arcadia-devtools@yandex-team.ru>2022-02-07 18:08:42 +0300
committerDevtools Arcadia <arcadia-devtools@mous.vla.yp-c.yandex.net>2022-02-07 18:08:42 +0300
commit1110808a9d39d4b808aef724c861a2e1a38d2a69 (patch)
treee26c9fed0de5d9873cce7e00bc214573dc2195b7 /contrib/libs/libaio/syscall-i386.h
downloadydb-1110808a9d39d4b808aef724c861a2e1a38d2a69.tar.gz
intermediate changes
ref:cde9a383711a11544ce7e107a78147fb96cc4029
Diffstat (limited to 'contrib/libs/libaio/syscall-i386.h')
-rw-r--r--contrib/libs/libaio/syscall-i386.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/contrib/libs/libaio/syscall-i386.h b/contrib/libs/libaio/syscall-i386.h
new file mode 100644
index 0000000000..9576975a19
--- /dev/null
+++ b/contrib/libs/libaio/syscall-i386.h
@@ -0,0 +1,72 @@
+#define __NR_io_setup 245
+#define __NR_io_destroy 246
+#define __NR_io_getevents 247
+#define __NR_io_submit 248
+#define __NR_io_cancel 249
+
+#define io_syscall1(type,fname,sname,type1,arg1) \
+type fname(type1 arg1) \
+{ \
+long __res; \
+__asm__ volatile ("xchgl %%edi,%%ebx\n" \
+ "int $0x80\n" \
+ "xchgl %%edi,%%ebx" \
+ : "=a" (__res) \
+ : "0" (__NR_##sname),"D" ((long)(arg1))); \
+return __res; \
+}
+
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
+type fname(type1 arg1,type2 arg2) \
+{ \
+long __res; \
+__asm__ volatile ("xchgl %%edi,%%ebx\n" \
+ "int $0x80\n" \
+ "xchgl %%edi,%%ebx" \
+ : "=a" (__res) \
+ : "0" (__NR_##sname),"D" ((long)(arg1)),"c" ((long)(arg2))); \
+return __res; \
+}
+
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
+type fname(type1 arg1,type2 arg2,type3 arg3) \
+{ \
+long __res; \
+__asm__ volatile ("xchgl %%edi,%%ebx\n" \
+ "int $0x80\n" \
+ "xchgl %%edi,%%ebx" \
+ : "=a" (__res) \
+ : "0" (__NR_##sname),"D" ((long)(arg1)),"c" ((long)(arg2)), \
+ "d" ((long)(arg3))); \
+return __res; \
+}
+
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type fname (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
+{ \
+long __res; \
+__asm__ volatile ("xchgl %%edi,%%ebx\n" \
+ "int $0x80\n" \
+ "xchgl %%edi,%%ebx" \
+ : "=a" (__res) \
+ : "0" (__NR_##sname),"D" ((long)(arg1)),"c" ((long)(arg2)), \
+ "d" ((long)(arg3)),"S" ((long)(arg4))); \
+return __res; \
+}
+
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
+ type5,arg5) \
+type fname (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
+{ \
+long __res; \
+long tmp; \
+__asm__ volatile ("movl %%ebx,%7\n" \
+ "movl %2,%%ebx\n" \
+ "int $0x80\n" \
+ "movl %7,%%ebx" \
+ : "=a" (__res) \
+ : "0" (__NR_##sname),"rm" ((long)(arg1)),"c" ((long)(arg2)), \
+ "d" ((long)(arg3)),"S" ((long)(arg4)),"D" ((long)(arg5)), \
+ "m" (tmp)); \
+return __res; \
+}