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| author | Maxim Yurchuk <maxim-yurchuk@ydb.tech> | 2024-10-18 20:31:38 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-18 20:31:38 +0300 |
| commit | 2a74bac2d2d3bccb4e10120f1ead805640ec9dd0 (patch) | |
| tree | 047e4818ced5aaf73f58517629e5260b5291f9f0 /contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S | |
| parent | 2d9656823e9521d8c29ea4c9a1d0eab78391abfc (diff) | |
| parent | 3d834a1923bbf9403cd4a448e7f32b670aa4124f (diff) | |
| download | ydb-2a74bac2d2d3bccb4e10120f1ead805640ec9dd0.tar.gz | |
Merge pull request #10502 from ydb-platform/mergelibs-241016-1210
Library import 241016-1210
Diffstat (limited to 'contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S')
| -rw-r--r-- | contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S b/contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S index e3bd8e05e0..af1d4f4fa5 100644 --- a/contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S +++ b/contrib/libs/cxxsupp/builtins/arm/fixdfsivfp.S @@ -1,9 +1,8 @@ //===-- fixdfsivfp.S - Implement fixdfsivfp -----------------------===// // -// The LLVM Compiler Infrastructure -// -// This file is dual licensed under the MIT and the University of Illinois Open -// Source Licenses. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// @@ -13,14 +12,22 @@ // extern int __fixdfsivfp(double a); // // Converts double precision float to a 32-bit int rounding towards zero. -// Uses Darwin calling convention where a double precision parameter is +// Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // .syntax unified .p2align 2 DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp) +#if defined(COMPILER_RT_ARMHF_TARGET) + vcvt.s32.f64 s0, d0 + vmov r0, s0 +#else vmov d7, r0, r1 // load double register from R0/R1 vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15 vmov r0, s15 // move s15 to result register +#endif bx lr END_COMPILERRT_FUNCTION(__fixdfsivfp) + +NO_EXEC_STACK_DIRECTIVE + |