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author | Frédéric Dalleau <frederic.dalleau@linux.intel.com> | 2013-04-08 15:24:18 +0200 |
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committer | Johan Hedberg <johan.hedberg@intel.com> | 2013-04-15 11:10:06 +0300 |
commit | c9e50c6ac4b478216cefdb89ff0b0909b18ab49f (patch) | |
tree | 2d8bc49c82c404fe377eaf835ba240bec1e64434 | |
parent | 80adf9b6b14e11dcf558588fe68159406ff8dcbf (diff) | |
download | sbc-c9e50c6ac4b478216cefdb89ff0b0909b18ab49f.tar.gz |
TODO: Add TODO list
-rw-r--r-- | TODO | 49 |
1 files changed, 49 insertions, 0 deletions
@@ -0,0 +1,49 @@ +Background +========== + +- Priority scale: High, Medium and Low + +- Complexity scale: C1, C2, C4 and C8. The complexity scale is exponential, + with complexity 1 being the lowest complexity. Complexity is a function + of both task 'complexity' and task 'scope'. + + The general rule of thumb is that a complexity 1 task should take 1-2 weeks + for a person very familiar with oFono codebase. Higher complexity tasks + require more time and have higher uncertainty. + + Higher complexity tasks should be refined into several lower complexity tasks + once the task is better understood. + +NEON instruction set +==================== + +- The neon optimization code is split in two parts. Sample reordering and blocks +encoding. There is a neon optimization for encoding SBC. But mSBC is not +supported by this optimizer because the reordering has been specifically for +mSBC. + + Priority: Low + Complexity: C2 + +SSE instruction set +=================== + +- The decoder is optimized to take advantage of advanced processor instruction +sets. Currently implemented are MMX, arm neon, arm v6 and iwmmxt. SSE3 is +is available since almost 10 years now, on a large range of Intel processors. +It should be interesting to implement it and to compare with MMX implementation +on Intel processors. + + Priority: Medium + Complexity: C4 + +Decoder improvements +==================== + +- Currently, only the decoder is optimized to take advantage of advanced +processor instruction sets. In use cases like HFP 1.6, optimizing the encoder +will bring a significant latency, power and performance advantage. For exemple, +the MMX encoder is 3 to 6 time faster than the SIMD encoder. + + Priority: High + Complexity: C8 |