1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
|
;*****************************************************************************
;* x86-optimized functions for fspp filter
;*
;* Copyright (c) 2003 Michael Niedermayer <michaelni@gmx.at>
;* Copyright (C) 2005 Nikolaj Poroshin <porosh3@psu.ru>
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
;* the Free Software Foundation; either version 2 of the License, or
;* (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;* GNU General Public License for more details.
;*
;* You should have received a copy of the GNU General Public License along
;* with FFmpeg; if not, write to the Free Software Foundation, Inc.,
;* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
;******************************************************************************
%include "libavutil/x86/x86util.asm"
SECTION_RODATA
pb_dither: db 0, 48, 12, 60, 3, 51, 15, 63, 32, 16, 44, 28, 35, 19, 47, 31, \
8, 56, 4, 52, 11, 59, 7, 55, 40, 24, 36, 20, 43, 27, 39, 23, \
2, 50, 14, 62, 1, 49, 13, 61, 34, 18, 46, 30, 33, 17, 45, 29, \
10, 58, 6, 54, 9, 57, 5, 53, 42, 26, 38, 22, 41, 25, 37, 21
pw_187E: times 4 dw 0x187E ; FIX64(0.382683433, 14)
pw_22A3: times 4 dw 0x22A3 ; FIX64(1.082392200, 13)
pw_2D41: times 4 dw 0x2D41 ; FIX64(1.414213562, 13)
pw_539F: times 4 dw 0x539F ; FIX64(1.306562965, 14)
pw_5A82: times 4 dw 0x5A82 ; FIX64(1.414213562, 14)
pw_3B21: times 4 dw 0x3B21 ; FIX64(1.847759065, 13)
pw_AC62: times 4 dw 0xAC62 ; FIX64(-2.613125930, 13)
pw_3642: times 4 dw 0x3642 ; FIX64(0.847759065, 14)
pw_2441: times 4 dw 0x2441 ; FIX64(0.566454497, 14)
pw_0CBB: times 4 dw 0x0CBB ; FIX64(0.198912367, 14)
pw_4: times 4 dw 4
pw_2: times 4 dw 2
SECTION .text
%define DCTSIZE 8
INIT_MMX mmx
;void ff_store_slice_mmx(uint8_t *dst, int16_t *src,
; ptrdiff_t dst_stride, ptrdiff_t src_stride,
; ptrdiff_t width, ptrdiff_t height, ptrdiff_t log2_scale)
%if ARCH_X86_64
cglobal store_slice, 7, 9, 0, dst, src, dst_stride, src_stride, width, dither_height, dither, tmp, tmp2
%else
cglobal store_slice, 2, 7, 0, dst, src, width, dither_height, dither, tmp, tmp2
%define dst_strideq r2m
%define src_strideq r3m
mov widthq, r4m
mov dither_heightq, r5m
mov ditherq, r6m ; log2_scale
%endif
add widthq, 7
mov tmpq, src_strideq
and widthq, ~7
sub dst_strideq, widthq
movd m5, ditherq ; log2_scale
xor ditherq, -1 ; log2_scale
mov tmp2q, tmpq
add ditherq, 7 ; log2_scale
neg tmpq
sub tmp2q, widthq
movd m2, ditherq ; log2_scale
add tmp2q, tmp2q
lea ditherq, [pb_dither]
mov src_strideq, tmp2q
shl tmpq, 4
lea dither_heightq, [ditherq+dither_heightq*8]
pxor m7, m7
.loop_height:
movq m3, [ditherq]
movq m4, m3
punpcklbw m3, m7
punpckhbw m4, m7
mov tmp2q, widthq
psraw m3, m5
psraw m4, m5
.loop_width:
movq [srcq+tmpq], m7
movq m0, [srcq]
movq m1, [srcq+8]
movq [srcq+tmpq+8], m7
paddw m0, m3
paddw m1, m4
movq [srcq], m7
psraw m0, m2
psraw m1, m2
movq [srcq+8], m7
packuswb m0, m1
add srcq, 16
movq [dstq], m0
add dstq, 8
sub tmp2q, 8
jg .loop_width
add srcq, src_strideq
add ditherq, 8
add dstq, dst_strideq
cmp ditherq, dither_heightq
jl .loop_height
RET
;void ff_store_slice2_mmx(uint8_t *dst, int16_t *src,
; ptrdiff_t dst_stride, ptrdiff_t src_stride,
; ptrdiff_t width, ptrdiff_t height, ptrdiff_t log2_scale)
%if ARCH_X86_64
cglobal store_slice2, 7, 9, 0, dst, src, dst_stride, src_stride, width, dither_height, dither, tmp, tmp2
%else
cglobal store_slice2, 0, 7, 0, dst, src, width, dither_height, dither, tmp, tmp2
%define dst_strideq r2m
%define src_strideq r3m
mov dstq, dstm
mov srcq, srcm
mov widthq, r4m
mov dither_heightq, r5m
mov ditherq, r6m ; log2_scale
%endif
add widthq, 7
mov tmpq, src_strideq
and widthq, ~7
sub dst_strideq, widthq
movd m5, ditherq ; log2_scale
xor ditherq, -1 ; log2_scale
mov tmp2q, tmpq
add ditherq, 7 ; log2_scale
sub tmp2q, widthq
movd m2, ditherq ; log2_scale
add tmp2q, tmp2q
lea ditherq, [pb_dither]
mov src_strideq, tmp2q
shl tmpq, 5
lea dither_heightq, [ditherq+dither_heightq*8]
pxor m7, m7
.loop_height:
movq m3, [ditherq]
movq m4, m3
punpcklbw m3, m7
punpckhbw m4, m7
mov tmp2q,widthq
psraw m3, m5
psraw m4, m5
.loop_width:
movq m0, [srcq]
movq m1, [srcq+8]
paddw m0, m3
paddw m0, [srcq+tmpq]
paddw m1, m4
movq m6, [srcq+tmpq+8]
movq [srcq+tmpq], m7
psraw m0, m2
paddw m1, m6
movq [srcq+tmpq+8], m7
psraw m1, m2
packuswb m0, m1
movq [dstq], m0
add srcq, 16
add dstq, 8
sub tmp2q, 8
jg .loop_width
add srcq, src_strideq
add ditherq, 8
add dstq, dst_strideq
cmp ditherq, dither_heightq
jl .loop_height
RET
;void ff_mul_thrmat_mmx(int16_t *thr_adr_noq, int16_t *thr_adr, int q);
cglobal mul_thrmat, 3, 3, 0, thrn, thr, q
movd m7, qd
movq m0, [thrnq]
punpcklwd m7, m7
movq m1, [thrnq+8]
punpckldq m7, m7
pmullw m0, m7
movq m2, [thrnq+8*2]
pmullw m1, m7
movq m3, [thrnq+8*3]
pmullw m2, m7
movq [thrq], m0
movq m4, [thrnq+8*4]
pmullw m3, m7
movq [thrq+8], m1
movq m5, [thrnq+8*5]
pmullw m4, m7
movq [thrq+8*2], m2
movq m6, [thrnq+8*6]
pmullw m5, m7
movq [thrq+8*3], m3
movq m0, [thrnq+8*7]
pmullw m6, m7
movq [thrq+8*4], m4
movq m1, [thrnq+8*7+8]
pmullw m0, m7
movq [thrq+8*5], m5
movq m2, [thrnq+8*7+8*2]
pmullw m1, m7
movq [thrq+8*6], m6
movq m3, [thrnq+8*7+8*3]
pmullw m2, m7
movq [thrq+8*7], m0
movq m4, [thrnq+8*7+8*4]
pmullw m3, m7
movq [thrq+8*7+8], m1
movq m5, [thrnq+8*7+8*5]
pmullw m4, m7
movq [thrq+8*7+8*2], m2
movq m6, [thrnq+8*7+8*6]
pmullw m5, m7
movq [thrq+8*7+8*3], m3
movq m0, [thrnq+14*8]
pmullw m6, m7
movq [thrq+8*7+8*4], m4
movq m1, [thrnq+14*8+8]
pmullw m0, m7
movq [thrq+8*7+8*5], m5
pmullw m1, m7
movq [thrq+8*7+8*6], m6
movq [thrq+14*8], m0
movq [thrq+14*8+8], m1
RET
%macro COLUMN_FDCT 1-3 0, 0
movq m1, [srcq+DCTSIZE*0*2]
movq m7, [srcq+DCTSIZE*3*2]
movq m0, m1
paddw m1, [srcq+DCTSIZE*7*2]
movq m3, m7
paddw m7, [srcq+DCTSIZE*4*2]
movq m5, m1
movq m6, [srcq+DCTSIZE*1*2]
psubw m1, m7
movq m2, [srcq+DCTSIZE*2*2]
movq m4, m6
paddw m6, [srcq+DCTSIZE*6*2]
paddw m5, m7
paddw m2, [srcq+DCTSIZE*5*2]
movq m7, m6
paddw m6, m2
psubw m7, m2
movq m2, m5
paddw m5, m6
psubw m2, m6
paddw m7, m1
movq m6, [thrq+4*16+%2]
psllw m7, 2
psubw m5, [thrq+%2]
psubw m2, m6
paddusw m5, [thrq+%2]
paddusw m2, m6
pmulhw m7, [pw_2D41]
paddw m5, [thrq+%2]
paddw m2, m6
psubusw m5, [thrq+%2]
psubusw m2, m6
paddw m5, [pw_2]
movq m6, m2
paddw m2, m5
psubw m5, m6
movq m6, m1
paddw m1, m7
psubw m1, [thrq+2*16+%2]
psubw m6, m7
movq m7, [thrq+6*16+%2]
psraw m5, 2
paddusw m1, [thrq+2*16+%2]
psubw m6, m7
paddw m1, [thrq+2*16+%2]
paddusw m6, m7
psubusw m1, [thrq+2*16+%2]
paddw m6, m7
psubw m3, [srcq+DCTSIZE*4*2]
psubusw m6, m7
movq m7, m1
psraw m2, 2
psubw m4, [srcq+DCTSIZE*6*2]
psubw m1, m6
psubw m0, [srcq+DCTSIZE*7*2]
paddw m6, m7
psraw m6, 2
movq m7, m2
pmulhw m1, [pw_5A82]
paddw m2, m6
movq [rsp], m2
psubw m7, m6
movq m2, [srcq+DCTSIZE*2*2]
psubw m1, m6
psubw m2, [srcq+DCTSIZE*5*2]
movq m6, m5
movq [rsp+8*3], m7
paddw m3, m2
paddw m2, m4
paddw m4, m0
movq m7, m3
psubw m3, m4
psllw m3, 2
psllw m7, 2
pmulhw m3, [pw_187E]
psllw m4, 2
pmulhw m7, [pw_22A3]
psllw m2, 2
pmulhw m4, [pw_539F]
paddw m5, m1
pmulhw m2, [pw_2D41]
psubw m6, m1
paddw m7, m3
movq [rsp+8], m5
paddw m4, m3
movq m3, [thrq+3*16+%2]
movq m1, m0
movq [rsp+8*2], m6
psubw m1, m2
paddw m0, m2
movq m5, m1
movq m2, [thrq+5*16+%2]
psubw m1, m7
paddw m5, m7
psubw m1, m3
movq m7, [thrq+16+%2]
psubw m5, m2
movq m6, m0
paddw m0, m4
paddusw m1, m3
psubw m6, m4
movq m4, [thrq+7*16+%2]
psubw m0, m7
psubw m6, m4
paddusw m5, m2
paddusw m6, m4
paddw m1, m3
paddw m5, m2
paddw m6, m4
psubusw m1, m3
psubusw m5, m2
psubusw m6, m4
movq m4, m1
por m4, m5
paddusw m0, m7
por m4, m6
paddw m0, m7
packssdw m4, m4
psubusw m0, m7
movd tmpd, m4
or tmpd, tmpd
jnz %1
movq m4, [rsp]
movq m1, m0
pmulhw m0, [pw_3642]
movq m2, m1
movq m5, [outq+DCTSIZE*0*2]
movq m3, m2
pmulhw m1, [pw_2441]
paddw m5, m4
movq m6, [rsp+8]
psraw m3, 2
pmulhw m2, [pw_0CBB]
psubw m4, m3
movq m7, [outq+DCTSIZE*1*2]
paddw m5, m3
movq [outq+DCTSIZE*7*2], m4
paddw m7, m6
movq m3, [rsp+8*2]
psubw m6, m0
movq m4, [outq+DCTSIZE*2*2]
paddw m7, m0
movq [outq], m5
paddw m4, m3
movq [outq+DCTSIZE*6*2], m6
psubw m3, m1
movq m5, [outq+DCTSIZE*5*2]
paddw m4, m1
movq m6, [outq+DCTSIZE*3*2]
paddw m5, m3
movq m0, [rsp+8*3]
add srcq, 8+%3
movq [outq+DCTSIZE*1*2], m7
paddw m6, m0
movq [outq+DCTSIZE*2*2], m4
psubw m0, m2
movq m7, [outq+DCTSIZE*4*2]
paddw m6, m2
movq [outq+DCTSIZE*5*2], m5
paddw m7, m0
movq [outq+DCTSIZE*3*2], m6
movq [outq+DCTSIZE*4*2], m7
add outq, 8+%3
%endmacro
%macro COLUMN_IDCT 0-1 0
movq m3, m5
psubw m5, m1
psllw m5, 1
paddw m3, m1
movq m2, m0
psubw m0, m6
movq m1, m5
psllw m0, 1
pmulhw m1, [pw_AC62]
paddw m5, m0
pmulhw m5, [pw_3B21]
paddw m2, m6
pmulhw m0, [pw_22A3]
movq m7, m2
movq m4, [rsp]
psubw m2, m3
psllw m2, 1
paddw m7, m3
pmulhw m2, [pw_2D41]
movq m6, m4
psraw m7, 2
paddw m4, [outq]
psubw m6, m7
movq m3, [rsp+8]
paddw m4, m7
movq [outq+DCTSIZE*7*2], m6
paddw m1, m5
movq [outq], m4
psubw m1, m7
movq m7, [rsp+8*2]
psubw m0, m5
movq m6, [rsp+8*3]
movq m5, m3
paddw m3, [outq+DCTSIZE*1*2]
psubw m5, m1
psubw m2, m1
paddw m3, m1
movq [outq+DCTSIZE*6*2], m5
movq m4, m7
paddw m7, [outq+DCTSIZE*2*2]
psubw m4, m2
paddw m4, [outq+DCTSIZE*5*2]
paddw m7, m2
movq [outq+DCTSIZE*1*2], m3
paddw m0, m2
movq [outq+DCTSIZE*2*2], m7
movq m1, m6
paddw m6, [outq+DCTSIZE*4*2]
psubw m1, m0
paddw m1, [outq+DCTSIZE*3*2]
paddw m6, m0
movq [outq+DCTSIZE*5*2], m4
add srcq, 8+%1
movq [outq+DCTSIZE*4*2], m6
movq [outq+DCTSIZE*3*2], m1
add outq, 8+%1
%endmacro
;void ff_column_fidct_mmx(int16_t *thr_adr, int16_t *data, int16_t *output, int cnt);
cglobal column_fidct, 4, 5, 0, 32, thr, src, out, cnt, tmp
.fdct1:
COLUMN_FDCT .idct1
jmp .fdct2
.idct1:
COLUMN_IDCT
.fdct2:
COLUMN_FDCT .idct2, 8, 16
sub cntd, 2
jg .fdct1
RET
.idct2:
COLUMN_IDCT 16
sub cntd, 2
jg .fdct1
RET
;void ff_row_idct_mmx(int16_t *workspace, int16_t *output_adr, ptrdiff_t output_stride, int cnt);
cglobal row_idct, 4, 5, 0, 16, src, dst, stride, cnt, stride3
add strideq, strideq
lea stride3q, [strideq+strideq*2]
.loop:
movq m0, [srcq+DCTSIZE*0*2]
movq m1, [srcq+DCTSIZE*1*2]
movq m4, m0
movq m2, [srcq+DCTSIZE*2*2]
punpcklwd m0, m1
movq m3, [srcq+DCTSIZE*3*2]
punpckhwd m4, m1
movq m7, m2
punpcklwd m2, m3
movq m6, m0
punpckldq m0, m2
punpckhdq m6, m2
movq m5, m0
punpckhwd m7, m3
psubw m0, m6
pmulhw m0, [pw_5A82]
movq m2, m4
punpckldq m4, m7
paddw m5, m6
punpckhdq m2, m7
movq m1, m4
psllw m0, 2
paddw m4, m2
movq m3, [srcq+DCTSIZE*0*2+8]
psubw m1, m2
movq m2, [srcq+DCTSIZE*1*2+8]
psubw m0, m5
movq m6, m4
paddw m4, m5
psubw m6, m5
movq m7, m1
movq m5, [srcq+DCTSIZE*2*2+8]
paddw m1, m0
movq [rsp], m4
movq m4, m3
movq [rsp+8], m6
punpcklwd m3, m2
movq m6, [srcq+DCTSIZE*3*2+8]
punpckhwd m4, m2
movq m2, m5
punpcklwd m5, m6
psubw m7, m0
punpckhwd m2, m6
movq m0, m3
punpckldq m3, m5
punpckhdq m0, m5
movq m5, m4
movq m6, m3
punpckldq m4, m2
psubw m3, m0
punpckhdq m5, m2
paddw m6, m0
movq m2, m4
movq m0, m3
psubw m4, m5
pmulhw m0, [pw_AC62]
paddw m3, m4
pmulhw m3, [pw_3B21]
paddw m2, m5
pmulhw m4, [pw_22A3]
movq m5, m2
psubw m2, m6
paddw m5, m6
pmulhw m2, [pw_2D41]
paddw m0, m3
psllw m0, 3
psubw m4, m3
movq m6, [rsp]
movq m3, m1
psllw m4, 3
psubw m0, m5
psllw m2, 3
paddw m1, m0
psubw m2, m0
psubw m3, m0
paddw m4, m2
movq m0, m7
paddw m7, m2
psubw m0, m2
movq m2, [pw_4]
psubw m6, m5
paddw m5, [rsp]
paddw m1, m2
paddw m5, m2
psraw m1, 3
paddw m7, m2
psraw m5, 3
paddw m5, [dstq]
psraw m7, 3
paddw m1, [dstq+strideq*1]
paddw m0, m2
paddw m7, [dstq+strideq*2]
paddw m3, m2
movq [dstq], m5
paddw m6, m2
movq [dstq+strideq*1], m1
psraw m0, 3
movq [dstq+strideq*2], m7
add dstq, stride3q
movq m5, [rsp+8]
psraw m3, 3
paddw m0, [dstq+strideq*2]
psubw m5, m4
paddw m3, [dstq+stride3q*1]
psraw m6, 3
paddw m4, [rsp+8]
paddw m5, m2
paddw m6, [dstq+strideq*4]
paddw m4, m2
movq [dstq+strideq*2], m0
psraw m5, 3
paddw m5, [dstq]
psraw m4, 3
paddw m4, [dstq+strideq*1]
add srcq, DCTSIZE*2*4
movq [dstq+stride3q*1], m3
movq [dstq+strideq*4], m6
movq [dstq], m5
movq [dstq+strideq*1], m4
sub dstq, stride3q
add dstq, 8
dec r3d
jnz .loop
RET
;void ff_row_fdct_mmx(int16_t *data, const uint8_t *pixels, ptrdiff_t line_size, int cnt);
cglobal row_fdct, 4, 5, 0, 16, src, pix, stride, cnt, stride3
lea stride3q, [strideq+strideq*2]
.loop:
movd m0, [pixq]
pxor m7, m7
movd m1, [pixq+strideq*1]
punpcklbw m0, m7
movd m2, [pixq+strideq*2]
punpcklbw m1, m7
punpcklbw m2, m7
add pixq,stride3q
movq m5, m0
movd m3, [pixq+strideq*4]
movq m6, m1
movd m4, [pixq+stride3q*1]
punpcklbw m3, m7
psubw m5, m3
punpcklbw m4, m7
paddw m0, m3
psubw m6, m4
movd m3, [pixq+strideq*2]
paddw m1, m4
movq [rsp], m5
punpcklbw m3, m7
movq [rsp+8], m6
movq m4, m2
movd m5, [pixq]
paddw m2, m3
movd m6, [pixq+strideq*1]
punpcklbw m5, m7
psubw m4, m3
punpcklbw m6, m7
movq m3, m5
paddw m5, m6
psubw m3, m6
movq m6, m0
movq m7, m1
psubw m0, m5
psubw m1, m2
paddw m7, m2
paddw m1, m0
movq m2, m7
psllw m1, 2
paddw m6, m5
pmulhw m1, [pw_2D41]
paddw m7, m6
psubw m6, m2
movq m5, m0
movq m2, m7
punpcklwd m7, m6
paddw m0, m1
punpckhwd m2, m6
psubw m5, m1
movq m6, m0
movq m1, [rsp+8]
punpcklwd m0, m5
punpckhwd m6, m5
movq m5, m0
punpckldq m0, m7
paddw m3, m4
punpckhdq m5, m7
movq m7, m6
movq [srcq+DCTSIZE*0*2], m0
punpckldq m6, m2
movq [srcq+DCTSIZE*1*2], m5
punpckhdq m7, m2
movq [srcq+DCTSIZE*2*2], m6
paddw m4, m1
movq [srcq+DCTSIZE*3*2], m7
psllw m3, 2
movq m2, [rsp]
psllw m4, 2
pmulhw m4, [pw_2D41]
paddw m1, m2
psllw m1, 2
movq m0, m3
pmulhw m0, [pw_22A3]
psubw m3, m1
pmulhw m3, [pw_187E]
movq m5, m2
pmulhw m1, [pw_539F]
psubw m2, m4
paddw m5, m4
movq m6, m2
paddw m0, m3
movq m7, m5
paddw m2, m0
psubw m6, m0
movq m4, m2
paddw m1, m3
punpcklwd m2, m6
paddw m5, m1
punpckhwd m4, m6
psubw m7, m1
movq m6, m5
punpcklwd m5, m7
punpckhwd m6, m7
movq m7, m2
punpckldq m2, m5
sub pixq, stride3q
punpckhdq m7, m5
movq m5, m4
movq [srcq+DCTSIZE*0*2+8], m2
punpckldq m4, m6
movq [srcq+DCTSIZE*1*2+8], m7
punpckhdq m5, m6
movq [srcq+DCTSIZE*2*2+8], m4
add pixq, 4
movq [srcq+DCTSIZE*3*2+8], m5
add srcq, DCTSIZE*4*2
dec cntd
jnz .loop
RET
|