1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
|
;******************************************************************************
;* H.264 intra prediction asm optimizations
;* Copyright (c) 2010 Fiona Glaser
;* Copyright (c) 2010 Holger Lubitz
;* Copyright (c) 2010 Loren Merritt
;* Copyright (c) 2010 Ronald S. Bultje
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;******************************************************************************
%include "libavutil/x86/x86util.asm"
SECTION_RODATA
tm_shuf: times 8 db 0x03, 0x80
pw_ff00: times 8 dw 0xff00
plane_shuf: db -8, -7, -6, -5, -4, -3, -2, -1
db 1, 2, 3, 4, 5, 6, 7, 8
plane8_shuf: db -4, -3, -2, -1, 0, 0, 0, 0
db 1, 2, 3, 4, 0, 0, 0, 0
pw_0to7: dw 0, 1, 2, 3, 4, 5, 6, 7
pw_1to8: dw 1, 2, 3, 4, 5, 6, 7, 8
pw_m8tom1: dw -8, -7, -6, -5, -4, -3, -2, -1
pw_m4to4: dw -4, -3, -2, -1, 1, 2, 3, 4
SECTION .text
cextern pb_1
cextern pb_3
cextern pw_4
cextern pw_8
;-----------------------------------------------------------------------------
; void ff_pred16x16_vertical_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_XMM sse
cglobal pred16x16_vertical_8, 2,3
sub r0, r1
mov r2, 4
movaps xmm0, [r0]
.loop:
movaps [r0+r1*1], xmm0
movaps [r0+r1*2], xmm0
lea r0, [r0+r1*2]
movaps [r0+r1*1], xmm0
movaps [r0+r1*2], xmm0
lea r0, [r0+r1*2]
dec r2
jg .loop
RET
;-----------------------------------------------------------------------------
; void ff_pred16x16_horizontal_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED16x16_H 0
cglobal pred16x16_horizontal_8, 2,3
mov r2, 8
%if cpuflag(ssse3)
mova m2, [pb_3]
%endif
.loop:
movd m0, [r0+r1*0-4]
movd m1, [r0+r1*1-4]
%if cpuflag(ssse3)
pshufb m0, m2
pshufb m1, m2
%else
punpcklbw m0, m0
punpcklbw m1, m1
SPLATW m0, m0, 3
SPLATW m1, m1, 3
%endif
mova [r0+r1*0], m0
mova [r0+r1*1], m1
lea r0, [r0+r1*2]
dec r2
jg .loop
RET
%endmacro
INIT_XMM sse2
PRED16x16_H
INIT_XMM ssse3
PRED16x16_H
;-----------------------------------------------------------------------------
; void ff_pred16x16_dc_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED16x16_DC 0
cglobal pred16x16_dc_8, 2,7
mov r4, r0
sub r0, r1
pxor mm0, mm0
pxor mm1, mm1
psadbw mm0, [r0+0]
psadbw mm1, [r0+8]
dec r0
movzx r5d, byte [r0+r1*1]
paddw mm0, mm1
movd r6d, mm0
lea r0, [r0+r1*2]
%rep 7
movzx r2d, byte [r0+r1*0]
movzx r3d, byte [r0+r1*1]
add r5d, r2d
add r6d, r3d
lea r0, [r0+r1*2]
%endrep
movzx r2d, byte [r0+r1*0]
add r5d, r6d
lea r2d, [r2+r5+16]
shr r2d, 5
%if cpuflag(ssse3)
pxor m1, m1
%endif
SPLATB_REG m0, r2, m1
mov r3d, 4
.loop:
mova [r4+r1*0], m0
mova [r4+r1*1], m0
lea r4, [r4+r1*2]
mova [r4+r1*0], m0
mova [r4+r1*1], m0
lea r4, [r4+r1*2]
dec r3d
jg .loop
RET
%endmacro
INIT_XMM sse2
PRED16x16_DC
INIT_XMM ssse3
PRED16x16_DC
;-----------------------------------------------------------------------------
; void ff_pred16x16_tm_vp8_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_XMM sse2
cglobal pred16x16_tm_vp8_8, 2,6,6
sub r0, r1
pxor xmm2, xmm2
movdqa xmm0, [r0]
movdqa xmm1, xmm0
punpcklbw xmm0, xmm2
punpckhbw xmm1, xmm2
movzx r4d, byte [r0-1]
mov r5d, 8
.loop:
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
sub r2d, r4d
sub r3d, r4d
movd xmm2, r2d
movd xmm4, r3d
pshuflw xmm2, xmm2, 0
pshuflw xmm4, xmm4, 0
punpcklqdq xmm2, xmm2
punpcklqdq xmm4, xmm4
movdqa xmm3, xmm2
movdqa xmm5, xmm4
paddw xmm2, xmm0
paddw xmm3, xmm1
paddw xmm4, xmm0
paddw xmm5, xmm1
packuswb xmm2, xmm3
packuswb xmm4, xmm5
movdqa [r0+r1*1], xmm2
movdqa [r0+r1*2], xmm4
lea r0, [r0+r1*2]
dec r5d
jg .loop
RET
%if HAVE_AVX2_EXTERNAL
INIT_YMM avx2
cglobal pred16x16_tm_vp8_8, 2, 4, 5, dst, stride, stride3, iteration
sub dstq, strideq
pmovzxbw m0, [dstq]
vpbroadcastb xm1, [r0-1]
pmovzxbw m1, xm1
psubw m0, m1
mov iterationd, 4
lea stride3q, [strideq*3]
.loop:
vpbroadcastb xm1, [dstq+strideq*1-1]
vpbroadcastb xm2, [dstq+strideq*2-1]
vpbroadcastb xm3, [dstq+stride3q-1]
vpbroadcastb xm4, [dstq+strideq*4-1]
pmovzxbw m1, xm1
pmovzxbw m2, xm2
pmovzxbw m3, xm3
pmovzxbw m4, xm4
paddw m1, m0
paddw m2, m0
paddw m3, m0
paddw m4, m0
vpackuswb m1, m1, m2
vpackuswb m3, m3, m4
vpermq m1, m1, q3120
vpermq m3, m3, q3120
movdqa [dstq+strideq*1], xm1
vextracti128 [dstq+strideq*2], m1, 1
movdqa [dstq+stride3q*1], xm3
vextracti128 [dstq+strideq*4], m3, 1
lea dstq, [dstq+strideq*4]
dec iterationd
jg .loop
RET
%endif
;-----------------------------------------------------------------------------
; void ff_pred16x16_plane_*_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro H264_PRED16x16_PLANE 1
cglobal pred16x16_plane_%1_8, 2,9,7
mov r2, r1 ; +stride
neg r1 ; -stride
movh m0, [r0+r1 -1]
%if cpuflag(ssse3)
movhps m0, [r0+r1 +8]
pmaddubsw m0, [plane_shuf] ; H coefficients
%else ; sse2
pxor m2, m2
movh m1, [r0+r1 +8]
punpcklbw m0, m2
punpcklbw m1, m2
pmullw m0, [pw_m8tom1]
pmullw m1, [pw_1to8]
paddw m0, m1
%endif
movhlps m1, m0
paddw m0, m1
PSHUFLW m1, m0, 0xE
paddw m0, m1
PSHUFLW m1, m0, 0x1
paddw m0, m1 ; sum of H coefficients
lea r4, [r0+r2*8-1]
lea r3, [r0+r2*4-1]
add r4, r2
%if ARCH_X86_64
%define e_reg r8
%else
%define e_reg r0
%endif
movzx e_reg, byte [r3+r2*2 ]
movzx r5, byte [r4+r1 ]
sub r5, e_reg
movzx e_reg, byte [r3+r2 ]
movzx r6, byte [r4 ]
sub r6, e_reg
lea r5, [r5+r6*2]
movzx e_reg, byte [r3+r1 ]
movzx r6, byte [r4+r2*2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
movzx e_reg, byte [r3 ]
%if ARCH_X86_64
movzx r7, byte [r4+r2 ]
sub r7, e_reg
%else
movzx r6, byte [r4+r2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
sub r5, r6
%endif
lea e_reg, [r3+r1*4]
lea r3, [r4+r2*4]
movzx r4, byte [e_reg+r2 ]
movzx r6, byte [r3 ]
sub r6, r4
%if ARCH_X86_64
lea r6, [r7+r6*2]
lea r5, [r5+r6*2]
add r5, r6
%else
lea r5, [r5+r6*4]
lea r5, [r5+r6*2]
%endif
movzx r4, byte [e_reg ]
%if ARCH_X86_64
movzx r7, byte [r3 +r2 ]
sub r7, r4
sub r5, r7
%else
movzx r6, byte [r3 +r2 ]
sub r6, r4
lea r5, [r5+r6*8]
sub r5, r6
%endif
movzx r4, byte [e_reg+r1 ]
movzx r6, byte [r3 +r2*2]
sub r6, r4
%if ARCH_X86_64
add r6, r7
%endif
lea r5, [r5+r6*8]
movzx r4, byte [e_reg+r2*2]
movzx r6, byte [r3 +r1 ]
sub r6, r4
lea r5, [r5+r6*4]
add r5, r6 ; sum of V coefficients
%if ARCH_X86_64 == 0
mov r0, r0m
%endif
%ifidn %1, h264
lea r5, [r5*5+32]
sar r5, 6
%elifidn %1, rv40
lea r5, [r5*5]
sar r5, 6
%elifidn %1, svq3
test r5, r5
lea r6, [r5+3]
cmovs r5, r6
sar r5, 2 ; V/4
lea r5, [r5*5] ; 5*(V/4)
test r5, r5
lea r6, [r5+15]
cmovs r5, r6
sar r5, 4 ; (5*(V/4))/16
%endif
movzx r4, byte [r0+r1 +15]
movzx r3, byte [r3+r2*2 ]
lea r3, [r3+r4+1]
shl r3, 4
movd r1d, m0
movsx r1d, r1w
%ifnidn %1, svq3
%ifidn %1, h264
lea r1d, [r1d*5+32]
%else ; rv40
lea r1d, [r1d*5]
%endif
sar r1d, 6
%else ; svq3
test r1d, r1d
lea r4d, [r1d+3]
cmovs r1d, r4d
sar r1d, 2 ; H/4
lea r1d, [r1d*5] ; 5*(H/4)
test r1d, r1d
lea r4d, [r1d+15]
cmovs r1d, r4d
sar r1d, 4 ; (5*(H/4))/16
%endif
movd m0, r1d
add r1d, r5d
add r3d, r1d
shl r1d, 3
sub r3d, r1d ; a
movd m1, r5d
movd m3, r3d
SPLATW m0, m0, 0 ; H
SPLATW m1, m1, 0 ; V
SPLATW m3, m3, 0 ; a
%ifidn %1, svq3
SWAP 0, 1
%endif
mova m2, m0
pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
psllw m2, 3
paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
paddw m2, m0 ; a + {8,9,10,11,12,13,14,15}*H
mov r4, 8
.loop:
mova m3, m0 ; b[0..7]
mova m4, m2 ; b[8..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0], m3
paddw m0, m1
paddw m2, m1
mova m3, m0 ; b[0..7]
mova m4, m2 ; b[8..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0+r2], m3
paddw m0, m1
paddw m2, m1
lea r0, [r0+r2*2]
dec r4
jg .loop
RET
%endmacro
INIT_XMM sse2
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
INIT_XMM ssse3
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
;-----------------------------------------------------------------------------
; void ff_pred8x8_plane_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro H264_PRED8x8_PLANE 0
cglobal pred8x8_plane_8, 2,9,7
mov r2, r1 ; +stride
neg r1 ; -stride
movd m0, [r0+r1 -1]
%if cpuflag(ssse3)
movhps m0, [r0+r1 +4] ; this reads 4 bytes more than necessary
pmaddubsw m0, [plane8_shuf] ; H coefficients
%else ; sse2
pxor m2, m2
movd m1, [r0+r1 +4]
punpckldq m0, m1
punpcklbw m0, m2
pmullw m0, [pw_m4to4]
%endif
movhlps m1, m0
paddw m0, m1
%if notcpuflag(ssse3)
PSHUFLW m1, m0, 0xE
paddw m0, m1
%endif ; !ssse3
PSHUFLW m1, m0, 0x1
paddw m0, m1 ; sum of H coefficients
lea r4, [r0+r2*4-1]
lea r3, [r0 -1]
add r4, r2
%if ARCH_X86_64
%define e_reg r8
%else
%define e_reg r0
%endif
movzx e_reg, byte [r3+r2*2 ]
movzx r5, byte [r4+r1 ]
sub r5, e_reg
movzx e_reg, byte [r3 ]
%if ARCH_X86_64
movzx r7, byte [r4+r2 ]
sub r7, e_reg
sub r5, r7
%else
movzx r6, byte [r4+r2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
sub r5, r6
%endif
movzx e_reg, byte [r3+r1 ]
movzx r6, byte [r4+r2*2 ]
sub r6, e_reg
%if ARCH_X86_64
add r6, r7
%endif
lea r5, [r5+r6*4]
movzx e_reg, byte [r3+r2 ]
movzx r6, byte [r4 ]
sub r6, e_reg
lea r6, [r5+r6*2]
lea r5, [r6*9+16]
lea r5, [r5+r6*8]
sar r5, 5
%if ARCH_X86_64 == 0
mov r0, r0m
%endif
movzx r3, byte [r4+r2*2 ]
movzx r4, byte [r0+r1 +7]
lea r3, [r3+r4+1]
shl r3, 4
movd r1d, m0
movsx r1d, r1w
imul r1d, 17
add r1d, 16
sar r1d, 5
movd m0, r1d
add r1d, r5d
sub r3d, r1d
add r1d, r1d
sub r3d, r1d ; a
movd m1, r5d
movd m3, r3d
SPLATW m0, m0, 0 ; H
SPLATW m1, m1, 0 ; V
SPLATW m3, m3, 0 ; a
pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
mov r4, 4
ALIGN 16
.loop:
mova m3, m0 ; b[0..7]
paddw m0, m1
psraw m3, 5
mova m4, m0 ; V+b[0..7]
paddw m0, m1
psraw m4, 5
packuswb m3, m4
movh [r0], m3
movhps [r0+r2], m3
lea r0, [r0+r2*2]
dec r4
jg .loop
RET
%endmacro
INIT_XMM sse2
H264_PRED8x8_PLANE
INIT_XMM ssse3
H264_PRED8x8_PLANE
;-----------------------------------------------------------------------------
; void ff_pred8x8_vertical_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_XMM sse2
cglobal pred8x8_vertical_8, 2,2
sub r0, r1
movq m0, [r0]
%rep 3
movq [r0+r1*1], m0
movq [r0+r1*2], m0
lea r0, [r0+r1*2]
%endrep
movq [r0+r1*1], m0
movq [r0+r1*2], m0
RET
;-----------------------------------------------------------------------------
; void ff_pred8x8_horizontal_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8_H 0
cglobal pred8x8_horizontal_8, 2,3
mov r2, 4
%if cpuflag(ssse3)
mova m2, [pb_3]
%endif
.loop:
SPLATB_LOAD m0, r0+r1*0-1, m2
SPLATB_LOAD m1, r0+r1*1-1, m2
mova [r0+r1*0], m0
mova [r0+r1*1], m1
lea r0, [r0+r1*2]
dec r2
jg .loop
RET
%endmacro
INIT_MMX mmxext
PRED8x8_H
INIT_MMX ssse3
PRED8x8_H
;-----------------------------------------------------------------------------
; void ff_pred8x8_top_dc_8_mmxext(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_top_dc_8, 2,5
sub r0, r1
movq mm0, [r0]
pxor mm1, mm1
pxor mm2, mm2
lea r2, [r0+r1*2]
punpckhbw mm1, mm0
punpcklbw mm0, mm2
psadbw mm1, mm2 ; s1
lea r3, [r2+r1*2]
psadbw mm0, mm2 ; s0
psrlw mm1, 1
psrlw mm0, 1
pavgw mm1, mm2
lea r4, [r3+r1*2]
pavgw mm0, mm2
pshufw mm1, mm1, 0
pshufw mm0, mm0, 0 ; dc0 (w)
packuswb mm0, mm1 ; dc0,dc1 (b)
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
lea r0, [r3+r1*2]
movq [r2+r1*1], mm0
movq [r2+r1*2], mm0
movq [r3+r1*1], mm0
movq [r3+r1*2], mm0
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
RET
;-----------------------------------------------------------------------------
; void ff_pred8x8_dc_8_mmxext(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_dc_8, 2,5
sub r0, r1
pxor m7, m7
movd m0, [r0+0]
movd m1, [r0+4]
psadbw m0, m7 ; s0
mov r4, r0
psadbw m1, m7 ; s1
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
lea r0, [r0+r1*2]
add r2d, r3d
movzx r3d, byte [r0+r1*1-1]
add r2d, r3d
movzx r3d, byte [r0+r1*2-1]
add r2d, r3d
lea r0, [r0+r1*2]
movd m2, r2d ; s2
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
lea r0, [r0+r1*2]
add r2d, r3d
movzx r3d, byte [r0+r1*1-1]
add r2d, r3d
movzx r3d, byte [r0+r1*2-1]
add r2d, r3d
movd m3, r2d ; s3
punpcklwd m0, m1
mov r0, r4
punpcklwd m2, m3
punpckldq m0, m2 ; s0, s1, s2, s3
pshufw m3, m0, 11110110b ; s2, s1, s3, s3
lea r2, [r0+r1*2]
pshufw m0, m0, 01110100b ; s0, s1, s3, s1
paddw m0, m3
lea r3, [r2+r1*2]
psrlw m0, 2
pavgw m0, m7 ; s0+s2, s1, s3, s1+s3
lea r4, [r3+r1*2]
packuswb m0, m0
punpcklbw m0, m0
movq m1, m0
punpcklbw m0, m0
punpckhbw m1, m1
movq [r0+r1*1], m0
movq [r0+r1*2], m0
movq [r2+r1*1], m0
movq [r2+r1*2], m0
movq [r3+r1*1], m1
movq [r3+r1*2], m1
movq [r4+r1*1], m1
movq [r4+r1*2], m1
RET
;-----------------------------------------------------------------------------
; void ff_pred8x8_dc_rv40_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_dc_rv40_8, 2,7
mov r4, r0
sub r0, r1
pxor mm0, mm0
psadbw mm0, [r0]
dec r0
movzx r5d, byte [r0+r1*1]
movd r6d, mm0
lea r0, [r0+r1*2]
%rep 3
movzx r2d, byte [r0+r1*0]
movzx r3d, byte [r0+r1*1]
add r5d, r2d
add r6d, r3d
lea r0, [r0+r1*2]
%endrep
movzx r2d, byte [r0+r1*0]
add r5d, r6d
lea r2d, [r2+r5+8]
shr r2d, 4
movd mm0, r2d
punpcklbw mm0, mm0
pshufw mm0, mm0, 0
mov r3d, 4
.loop:
movq [r4+r1*0], mm0
movq [r4+r1*1], mm0
lea r4, [r4+r1*2]
dec r3d
jg .loop
RET
;-----------------------------------------------------------------------------
; void ff_pred8x8_tm_vp8_8(uint8_t *src, ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_XMM sse2
cglobal pred8x8_tm_vp8_8, 2,6,4
sub r0, r1
pxor xmm1, xmm1
movq xmm0, [r0]
punpcklbw xmm0, xmm1
movzx r4d, byte [r0-1]
mov r5d, 4
.loop:
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
sub r2d, r4d
sub r3d, r4d
movd xmm2, r2d
movd xmm3, r3d
pshuflw xmm2, xmm2, 0
pshuflw xmm3, xmm3, 0
punpcklqdq xmm2, xmm2
punpcklqdq xmm3, xmm3
paddw xmm2, xmm0
paddw xmm3, xmm0
packuswb xmm2, xmm3
movq [r0+r1*1], xmm2
movhps [r0+r1*2], xmm2
lea r0, [r0+r1*2]
dec r5d
jg .loop
RET
INIT_XMM ssse3
cglobal pred8x8_tm_vp8_8, 2,3,6
sub r0, r1
movdqa xmm4, [tm_shuf]
pxor xmm1, xmm1
movq xmm0, [r0]
punpcklbw xmm0, xmm1
movd xmm5, [r0-4]
pshufb xmm5, xmm4
mov r2d, 4
.loop:
movd xmm2, [r0+r1*1-4]
movd xmm3, [r0+r1*2-4]
pshufb xmm2, xmm4
pshufb xmm3, xmm4
psubw xmm2, xmm5
psubw xmm3, xmm5
paddw xmm2, xmm0
paddw xmm3, xmm0
packuswb xmm2, xmm3
movq [r0+r1*1], xmm2
movhps [r0+r1*2], xmm2
lea r0, [r0+r1*2]
dec r2d
jg .loop
RET
; dest, left, right, src, tmp
; output: %1 = (t[n-1] + t[n]*2 + t[n+1] + 2) >> 2
%macro PRED4x4_LOWPASS 5
mova %5, %2
pavgb %2, %3
pxor %3, %5
mova %1, %4
pand %3, [pb_1]
psubusb %2, %3
pavgb %1, %2
%endmacro
;-----------------------------------------------------------------------------
; void ff_pred8x8l_top_dc_8(uint8_t *src, int has_topleft, int has_topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_TOP_DC 0
cglobal pred8x8l_top_dc_8, 4,4
sub r0, r3
pxor mm7, mm7
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d ; top_left
jz .fix_lt_2
test r2d, r2d ; top_right
jz .fix_tr_1
jmp .body
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d ; top_right
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
.body:
PRED4x4_LOWPASS mm0, mm2, mm1, mm3, mm5
psadbw mm7, mm0
paddw mm7, [pw_4]
psrlw mm7, 3
pshufw mm7, mm7, 0
packuswb mm7, mm7
%rep 3
movq [r0+r3*1], mm7
movq [r0+r3*2], mm7
lea r0, [r0+r3*2]
%endrep
movq [r0+r3*1], mm7
movq [r0+r3*2], mm7
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_TOP_DC
INIT_MMX ssse3
PRED8x8L_TOP_DC
;-----------------------------------------------------------------------------
; void ff_pred8x8l_dc_8(uint8_t *src, int has_topleft, int has_topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_DC 0
cglobal pred8x8l_dc_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1d, r1d
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .body
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d
jz .fix_lt_2
test r2d, r2d
jz .fix_tr_1
.body:
lea r1, [r0+r3*2]
PRED4x4_LOWPASS mm6, mm2, mm1, mm3, mm5
pxor mm0, mm0
pxor mm1, mm1
lea r2, [r1+r3*2]
psadbw mm0, mm7
psadbw mm1, mm6
paddw mm0, [pw_8]
paddw mm0, mm1
lea r4, [r2+r3*2]
psrlw mm0, 4
pshufw mm0, mm0, 0
packuswb mm0, mm0
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
movq [r1+r3*1], mm0
movq [r1+r3*2], mm0
movq [r2+r3*1], mm0
movq [r2+r3*2], mm0
movq [r4+r3*1], mm0
movq [r4+r3*2], mm0
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_DC
INIT_MMX ssse3
PRED8x8L_DC
;-----------------------------------------------------------------------------
; void ff_pred8x8l_horizontal_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_HORIZONTAL 0
cglobal pred8x8l_horizontal_8, 4,4
sub r0, r3
lea r2, [r0+r3*2]
movq mm0, [r0+r3*1-8]
test r1d, r1d
lea r1, [r0+r3]
cmovnz r1, r0
punpckhbw mm0, [r1+r3*0-8]
movq mm1, [r2+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r2, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r1+r3*0-8]
mov r0, r2
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm3, mm7
lea r1, [r0+r3*2]
movq mm7, mm3
punpckhbw mm3, mm3
punpcklbw mm7, mm7
pshufw mm0, mm3, 0xff
pshufw mm1, mm3, 0xaa
lea r2, [r1+r3*2]
pshufw mm2, mm3, 0x55
pshufw mm3, mm3, 0x00
pshufw mm4, mm7, 0xff
pshufw mm5, mm7, 0xaa
pshufw mm6, mm7, 0x55
pshufw mm7, mm7, 0x00
movq [r0+r3*1], mm0
movq [r0+r3*2], mm1
movq [r1+r3*1], mm2
movq [r1+r3*2], mm3
movq [r2+r3*1], mm4
movq [r2+r3*2], mm5
lea r0, [r2+r3*2]
movq [r0+r3*1], mm6
movq [r0+r3*2], mm7
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_HORIZONTAL
INIT_MMX ssse3
PRED8x8L_HORIZONTAL
;-----------------------------------------------------------------------------
; void ff_pred8x8l_vertical_8(uint8_t *src, int has_topleft, int has_topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_VERTICAL 0
cglobal pred8x8l_vertical_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d ; top_left
jz .fix_lt_2
test r2d, r2d ; top_right
jz .fix_tr_1
jmp .body
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d ; top_right
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
.body:
PRED4x4_LOWPASS mm0, mm2, mm1, mm3, mm5
%rep 3
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
lea r0, [r0+r3*2]
%endrep
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_VERTICAL
INIT_MMX ssse3
PRED8x8L_VERTICAL
;-----------------------------------------------------------------------------
; void ff_pred8x8l_down_left_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_DOWN_LEFT 0
cglobal pred8x8l_down_left_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d ; top_left
jz .fix_lt_2
test r2d, r2d ; top_right
jz .fix_tr_1
jmp .do_top
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d ; top_right
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm3, mm4
test r2d, r2d ; top_right
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm4, mm1
psrlq mm1, 56
movq2dq xmm5, mm1
lea r1, [r0+r3*2]
pslldq xmm4, 8
por xmm3, xmm4
movdqa xmm2, xmm3
psrldq xmm2, 1
pslldq xmm5, 15
por xmm2, xmm5
lea r2, [r1+r3*2]
movdqa xmm1, xmm3
pslldq xmm1, 1
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm4
psrldq xmm0, 1
movq [r0+r3*1], xmm0
psrldq xmm0, 1
movq [r0+r3*2], xmm0
psrldq xmm0, 1
lea r0, [r2+r3*2]
movq [r1+r3*1], xmm0
psrldq xmm0, 1
movq [r1+r3*2], xmm0
psrldq xmm0, 1
movq [r2+r3*1], xmm0
psrldq xmm0, 1
movq [r2+r3*2], xmm0
psrldq xmm0, 1
movq [r0+r3*1], xmm0
psrldq xmm0, 1
movq [r0+r3*2], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_DOWN_LEFT
INIT_MMX ssse3
PRED8x8L_DOWN_LEFT
;-----------------------------------------------------------------------------
; void ff_pred8x8l_down_right_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_DOWN_RIGHT 0
cglobal pred8x8l_down_right_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1d, r1d
jz .fix_lt_1
jmp .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
movq2dq xmm3, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq2dq xmm1, mm7
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d
jz .fix_lt_2
test r2d, r2d
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm4, mm4
lea r1, [r0+r3*2]
movdqa xmm0, xmm3
pslldq xmm4, 8
por xmm3, xmm4
lea r2, [r1+r3*2]
pslldq xmm4, 1
por xmm1, xmm4
psrldq xmm0, 7
pslldq xmm0, 15
psrldq xmm0, 7
por xmm1, xmm0
lea r0, [r2+r3*2]
movdqa xmm2, xmm3
psrldq xmm2, 1
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm4
movdqa xmm1, xmm0
psrldq xmm1, 1
movq [r0+r3*2], xmm0
movq [r0+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r2+r3*2], xmm0
movq [r2+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r1+r3*2], xmm0
movq [r1+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r4+r3*2], xmm0
movq [r4+r3*1], xmm1
RET
%endmacro
INIT_MMX sse2
PRED8x8L_DOWN_RIGHT
INIT_MMX ssse3
PRED8x8L_DOWN_RIGHT
;-----------------------------------------------------------------------------
; void ff_pred8x8l_vertical_right_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_VERTICAL_RIGHT 0
cglobal pred8x8l_vertical_right_8, 4,5,7
; manually spill XMM registers for Win64 because
; the code here is initialized with INIT_MMX
WIN64_SPILL_XMM 7
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1d, r1d
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq2dq xmm0, mm2
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d
jz .fix_lt_2
test r2d, r2d
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm6, mm2, mm1, mm3, mm5
lea r1, [r0+r3*2]
movq2dq xmm4, mm6
pslldq xmm4, 8
por xmm0, xmm4
movdqa xmm6, [pw_ff00]
movdqa xmm1, xmm0
lea r2, [r1+r3*2]
movdqa xmm2, xmm0
movdqa xmm3, xmm0
pslldq xmm0, 1
pslldq xmm1, 2
pavgb xmm2, xmm0
INIT_XMM cpuname
PRED4x4_LOWPASS xmm4, xmm3, xmm1, xmm0, xmm5
pandn xmm6, xmm4
movdqa xmm5, xmm4
psrlw xmm4, 8
packuswb xmm6, xmm4
movhlps xmm4, xmm6
movhps [r0+r3*2], xmm5
movhps [r0+r3*1], xmm2
psrldq xmm5, 4
movss xmm5, xmm6
psrldq xmm2, 4
movss xmm2, xmm4
lea r0, [r2+r3*2]
psrldq xmm5, 1
psrldq xmm2, 1
movq [r0+r3*2], xmm5
movq [r0+r3*1], xmm2
psrldq xmm5, 1
psrldq xmm2, 1
movq [r2+r3*2], xmm5
movq [r2+r3*1], xmm2
psrldq xmm5, 1
psrldq xmm2, 1
movq [r1+r3*2], xmm5
movq [r1+r3*1], xmm2
RET
%endmacro
INIT_MMX sse2
PRED8x8L_VERTICAL_RIGHT
INIT_MMX ssse3
PRED8x8L_VERTICAL_RIGHT
;-----------------------------------------------------------------------------
; void ff_pred8x8l_vertical_left_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_VERTICAL_LEFT 0
cglobal pred8x8l_vertical_left_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d
jz .fix_lt_2
test r2d, r2d
jz .fix_tr_1
jmp .do_top
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm4, mm4
test r2d, r2d
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm3, mm1
lea r1, [r0+r3*2]
pslldq xmm3, 8
por xmm4, xmm3
movdqa xmm2, xmm4
movdqa xmm1, xmm4
movdqa xmm3, xmm4
psrldq xmm2, 1
pslldq xmm1, 1
pavgb xmm3, xmm2
lea r2, [r1+r3*2]
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm4, xmm5
psrldq xmm0, 1
movq [r0+r3*1], xmm3
movq [r0+r3*2], xmm0
lea r0, [r2+r3*2]
psrldq xmm3, 1
psrldq xmm0, 1
movq [r1+r3*1], xmm3
movq [r1+r3*2], xmm0
psrldq xmm3, 1
psrldq xmm0, 1
movq [r2+r3*1], xmm3
movq [r2+r3*2], xmm0
psrldq xmm3, 1
psrldq xmm0, 1
movq [r0+r3*1], xmm3
movq [r0+r3*2], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_VERTICAL_LEFT
INIT_MMX ssse3
PRED8x8L_VERTICAL_LEFT
;-----------------------------------------------------------------------------
; void ff_pred8x8l_horizontal_up_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_HORIZONTAL_UP 0
cglobal pred8x8l_horizontal_up_8, 4,4
sub r0, r3
lea r2, [r0+r3*2]
movq mm0, [r0+r3*1-8]
test r1d, r1d
lea r1, [r0+r3]
cmovnz r1, r0
punpckhbw mm0, [r1+r3*0-8]
movq mm1, [r2+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r2, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r1+r3*0-8]
mov r0, r2
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
lea r1, [r0+r3*2]
pshufw mm0, mm7, 00011011b ; l6 l7 l4 l5 l2 l3 l0 l1
psllq mm7, 56 ; l7 .. .. .. .. .. .. ..
movq mm2, mm0
psllw mm0, 8
psrlw mm2, 8
por mm2, mm0 ; l7 l6 l5 l4 l3 l2 l1 l0
movq mm3, mm2
movq mm4, mm2
movq mm5, mm2
psrlq mm2, 8
psrlq mm3, 16
lea r2, [r1+r3*2]
por mm2, mm7 ; l7 l7 l6 l5 l4 l3 l2 l1
punpckhbw mm7, mm7
por mm3, mm7 ; l7 l7 l7 l6 l5 l4 l3 l2
pavgb mm4, mm2
PRED4x4_LOWPASS mm1, mm3, mm5, mm2, mm6
movq mm5, mm4
punpcklbw mm4, mm1 ; p4 p3 p2 p1
punpckhbw mm5, mm1 ; p8 p7 p6 p5
movq mm6, mm5
movq mm7, mm5
movq mm0, mm5
PALIGNR mm5, mm4, 2, mm1
pshufw mm1, mm6, 11111001b
PALIGNR mm6, mm4, 4, mm2
pshufw mm2, mm7, 11111110b
PALIGNR mm7, mm4, 6, mm3
pshufw mm3, mm0, 11111111b
movq [r0+r3*1], mm4
movq [r0+r3*2], mm5
lea r0, [r2+r3*2]
movq [r1+r3*1], mm6
movq [r1+r3*2], mm7
movq [r2+r3*1], mm0
movq [r2+r3*2], mm1
movq [r0+r3*1], mm2
movq [r0+r3*2], mm3
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_HORIZONTAL_UP
INIT_MMX ssse3
PRED8x8L_HORIZONTAL_UP
;-----------------------------------------------------------------------------
; void ff_pred8x8l_horizontal_down_8(uint8_t *src, int has_topleft,
; int has_topright, ptrdiff_t stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_HORIZONTAL_DOWN 0
cglobal pred8x8l_horizontal_down_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1d, r1d
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2d, r2d
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq2dq xmm0, mm2
pslldq xmm0, 8
movq mm4, mm0
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
movq2dq xmm2, mm1
pslldq xmm2, 15
psrldq xmm2, 8
por xmm0, xmm2
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1d, r1d
jz .fix_lt_2
test r2d, r2d
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm1, mm4
test r2d, r2d
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm5, mm1
pslldq xmm5, 8
por xmm1, xmm5
INIT_XMM cpuname
lea r2, [r4+r3*2]
movdqa xmm2, xmm1
movdqa xmm3, xmm1
PALIGNR xmm1, xmm0, 7, xmm4
PALIGNR xmm2, xmm0, 9, xmm5
lea r1, [r2+r3*2]
PALIGNR xmm3, xmm0, 8, xmm0
movdqa xmm4, xmm1
pavgb xmm4, xmm3
lea r0, [r1+r3*2]
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm5
punpcklbw xmm4, xmm0
movhlps xmm0, xmm4
movq [r0+r3*2], xmm4
movq [r2+r3*2], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r0+r3*1], xmm4
movq [r2+r3*1], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r1+r3*2], xmm4
movq [r4+r3*2], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r1+r3*1], xmm4
movq [r4+r3*1], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_HORIZONTAL_DOWN
INIT_MMX ssse3
PRED8x8L_HORIZONTAL_DOWN
;-------------------------------------------------------------------------------
; void ff_pred4x4_dc_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;-------------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_dc_8, 3,5
pxor mm7, mm7
mov r4, r0
sub r0, r2
movd mm0, [r0]
psadbw mm0, mm7
movzx r1d, byte [r0+r2*1-1]
movd r3d, mm0
add r3d, r1d
movzx r1d, byte [r0+r2*2-1]
lea r0, [r0+r2*2]
add r3d, r1d
movzx r1d, byte [r0+r2*1-1]
add r3d, r1d
movzx r1d, byte [r0+r2*2-1]
add r3d, r1d
add r3d, 4
shr r3d, 3
imul r3d, 0x01010101
mov [r4+r2*0], r3d
mov [r0+r2*0], r3d
mov [r0+r2*1], r3d
mov [r0+r2*2], r3d
RET
;-----------------------------------------------------------------------------
; void ff_pred4x4_tm_vp8_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_tm_vp8_8, 3,6
sub r0, r2
pxor mm7, mm7
movd mm0, [r0]
punpcklbw mm0, mm7
movzx r4d, byte [r0-1]
mov r5d, 2
.loop:
movzx r1d, byte [r0+r2*1-1]
movzx r3d, byte [r0+r2*2-1]
sub r1d, r4d
sub r3d, r4d
movd mm2, r1d
movd mm4, r3d
pshufw mm2, mm2, 0
pshufw mm4, mm4, 0
paddw mm2, mm0
paddw mm4, mm0
packuswb mm2, mm2
packuswb mm4, mm4
movd [r0+r2*1], mm2
movd [r0+r2*2], mm4
lea r0, [r0+r2*2]
dec r5d
jg .loop
RET
INIT_XMM ssse3
cglobal pred4x4_tm_vp8_8, 3,3
sub r0, r2
movq mm6, [tm_shuf]
pxor mm1, mm1
movd mm0, [r0]
punpcklbw mm0, mm1
movd mm7, [r0-4]
pshufb mm7, mm6
lea r1, [r0+r2*2]
movd mm2, [r0+r2*1-4]
movd mm3, [r0+r2*2-4]
movd mm4, [r1+r2*1-4]
movd mm5, [r1+r2*2-4]
pshufb mm2, mm6
pshufb mm3, mm6
pshufb mm4, mm6
pshufb mm5, mm6
psubw mm0, mm7
paddw mm2, mm0
paddw mm3, mm0
paddw mm4, mm0
paddw mm5, mm0
packuswb mm2, mm2
packuswb mm3, mm3
packuswb mm4, mm4
packuswb mm5, mm5
movd [r0+r2*1], mm2
movd [r0+r2*2], mm3
movd [r1+r2*1], mm4
movd [r1+r2*2], mm5
RET
;-----------------------------------------------------------------------------
; void ff_pred4x4_vertical_vp8_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_vp8_8, 3,3
sub r0, r2
movd m1, [r0-1]
movd m0, [r0]
mova m2, m0 ;t0 t1 t2 t3
punpckldq m0, [r1] ;t0 t1 t2 t3 t4 t5 t6 t7
lea r1, [r0+r2*2]
psrlq m0, 8 ;t1 t2 t3 t4
PRED4x4_LOWPASS m3, m1, m0, m2, m4
movd [r0+r2*1], m3
movd [r0+r2*2], m3
movd [r1+r2*1], m3
movd [r1+r2*2], m3
RET
;-----------------------------------------------------------------------------
; void ff_pred4x4_down_left_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_down_left_8, 3,3
sub r0, r2
movq m1, [r0]
punpckldq m1, [r1]
movq m2, m1
movq m3, m1
psllq m1, 8
pxor m2, m1
psrlq m2, 8
pxor m2, m3
PRED4x4_LOWPASS m0, m1, m2, m3, m4
lea r1, [r0+r2*2]
psrlq m0, 8
movd [r0+r2*1], m0
psrlq m0, 8
movd [r0+r2*2], m0
psrlq m0, 8
movd [r1+r2*1], m0
psrlq m0, 8
movd [r1+r2*2], m0
RET
;------------------------------------------------------------------------------
; void ff_pred4x4_vertical_left_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;------------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_left_8, 3,3
sub r0, r2
movq m1, [r0]
punpckldq m1, [r1]
movq m3, m1
movq m2, m1
psrlq m3, 8
psrlq m2, 16
movq m4, m3
pavgb m4, m1
PRED4x4_LOWPASS m0, m1, m2, m3, m5
lea r1, [r0+r2*2]
movh [r0+r2*1], m4
movh [r0+r2*2], m0
psrlq m4, 8
psrlq m0, 8
movh [r1+r2*1], m4
movh [r1+r2*2], m0
RET
;------------------------------------------------------------------------------
; void ff_pred4x4_horizontal_up_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;------------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_horizontal_up_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movd m0, [r0+r2*1-4]
punpcklbw m0, [r0+r2*2-4]
movd m1, [r1+r2*1-4]
punpcklbw m1, [r1+r2*2-4]
punpckhwd m0, m1
movq m1, m0
punpckhbw m1, m1
pshufw m1, m1, 0xFF
punpckhdq m0, m1
movq m2, m0
movq m3, m0
movq m7, m0
psrlq m2, 16
psrlq m3, 8
pavgb m7, m3
PRED4x4_LOWPASS m4, m0, m2, m3, m5
punpcklbw m7, m4
movd [r0+r2*1], m7
psrlq m7, 16
movd [r0+r2*2], m7
psrlq m7, 16
movd [r1+r2*1], m7
movd [r1+r2*2], m1
RET
;------------------------------------------------------------------------------
; void ff_pred4x4_horizontal_down_8_mmxext(uint8_t *src,
; const uint8_t *topright,
; ptrdiff_t stride)
;------------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_horizontal_down_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movh m0, [r0-4] ; lt ..
punpckldq m0, [r0] ; t3 t2 t1 t0 lt .. .. ..
psllq m0, 8 ; t2 t1 t0 lt .. .. .. ..
movd m1, [r1+r2*2-4] ; l3
punpcklbw m1, [r1+r2*1-4] ; l2 l3
movd m2, [r0+r2*2-4] ; l1
punpcklbw m2, [r0+r2*1-4] ; l0 l1
punpckhwd m1, m2 ; l0 l1 l2 l3
punpckhdq m1, m0 ; t2 t1 t0 lt l0 l1 l2 l3
movq m0, m1
movq m2, m1
movq m5, m1
psrlq m0, 16 ; .. .. t2 t1 t0 lt l0 l1
psrlq m2, 8 ; .. t2 t1 t0 lt l0 l1 l2
pavgb m5, m2
PRED4x4_LOWPASS m3, m1, m0, m2, m4
punpcklbw m5, m3
psrlq m3, 32
PALIGNR m3, m5, 6, m4
movh [r1+r2*2], m5
psrlq m5, 16
movh [r1+r2*1], m5
psrlq m5, 16
movh [r0+r2*2], m5
movh [r0+r2*1], m3
RET
;-----------------------------------------------------------------------------
; void ff_pred4x4_vertical_right_8_mmxext(uint8_t *src,
; const uint8_t *topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_right_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movh m0, [r0] ; ........t3t2t1t0
movq m5, m0
PALIGNR m0, [r0-8], 7, m1 ; ......t3t2t1t0lt
pavgb m5, m0
PALIGNR m0, [r0+r2*1-8], 7, m1 ; ....t3t2t1t0ltl0
movq m1, m0
PALIGNR m0, [r0+r2*2-8], 7, m2 ; ..t3t2t1t0ltl0l1
movq m2, m0
PALIGNR m0, [r1+r2*1-8], 7, m3 ; t3t2t1t0ltl0l1l2
PRED4x4_LOWPASS m3, m1, m0, m2, m4
movq m1, m3
psrlq m3, 16
psllq m1, 48
movh [r0+r2*1], m5
movh [r0+r2*2], m3
PALIGNR m5, m1, 7, m2
psllq m1, 8
movh [r1+r2*1], m5
PALIGNR m3, m1, 7, m1
movh [r1+r2*2], m3
RET
;-----------------------------------------------------------------------------
; void ff_pred4x4_down_right_8_mmxext(uint8_t *src, const uint8_t *topright,
; ptrdiff_t stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_down_right_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movq m1, [r1-8]
movq m2, [r0+r2*1-8]
punpckhbw m2, [r0-8]
movh m3, [r0]
punpckhwd m1, m2
PALIGNR m3, m1, 5, m1
movq m1, m3
PALIGNR m3, [r1+r2*1-8], 7, m4
movq m2, m3
PALIGNR m3, [r1+r2*2-8], 7, m4
PRED4x4_LOWPASS m0, m3, m1, m2, m4
movh [r1+r2*2], m0
psrlq m0, 8
movh [r1+r2*1], m0
psrlq m0, 8
movh [r0+r2*2], m0
psrlq m0, 8
movh [r0+r2*1], m0
RET
|