1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
|
/*
* Copyright © 2023 Rémi Denis-Courmont.
*
* This file is part of FFmpeg.
*
* FFmpeg is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "libavutil/riscv/asm.S"
func ff_flac_lpc16_rvv, zve32x, zbb
vtype_vli t0, a2, t2, e32, ta, ma
vsetvl zero, a2, t0
vle32.v v8, (a1)
sub a4, a4, a2
vle32.v v16, (a0)
sh2add a0, a2, a0
vmv.s.x v0, zero
1:
vmul.vv v24, v8, v16
lw t0, (a0)
vredsum.vs v24, v24, v0
addi a4, a4, -1
vmv.x.s t1, v24
sra t1, t1, a3
add t0, t0, t1
vslide1down.vx v16, v16, t0
sw t0, (a0)
addi a0, a0, 4
bnez a4, 1b
ret
endfunc
#if (__riscv_xlen == 64)
func ff_flac_lpc32_rvv, zve64x
addi t2, a2, -16
ble t2, zero, ff_flac_lpc32_rvv_simple
vsetivli zero, 1, e64, m1, ta, ma
vmv.s.x v0, zero
vsetvli zero, a2, e32, m8, ta, ma
vle32.v v8, (a1)
sub a4, a4, a2
vle32.v v16, (a0)
sh2add a0, a2, a0
1:
vsetvli zero, a2, e32, m4, ta, ma
vwmul.vv v24, v8, v16
vsetvli zero, t2, e32, m4, tu, ma
vwmacc.vv v24, v12, v20
vsetvli zero, a2, e64, m8, ta, ma
vredsum.vs v24, v24, v0
lw t0, (a0)
addi a4, a4, -1
vmv.x.s t1, v24
vsetvli zero, a2, e32, m8, ta, ma
sra t1, t1, a3
add t0, t0, t1
vslide1down.vx v16, v16, t0
sw t0, (a0)
addi a0, a0, 4
bnez a4, 1b
ret
endfunc
func ff_flac_lpc32_rvv_simple, zve64x, zbb
vtype_vli t3, a2, t1, e64, ta, ma
vntypei t2, t3
vsetvl zero, a2, t3 // e64
vmv.s.x v0, zero
vsetvl zero, zero, t2 // e32
vle32.v v8, (a1)
sub a4, a4, a2
vle32.v v16, (a0)
sh2add a0, a2, a0
1:
vwmul.vv v24, v8, v16
vsetvl zero, zero, t3 // e64
vredsum.vs v24, v24, v0
lw t0, (a0)
addi a4, a4, -1
vmv.x.s t1, v24
vsetvl zero, zero, t2 // e32
sra t1, t1, a3
add t0, t0, t1
vslide1down.vx v16, v16, t0
sw t0, (a0)
addi a0, a0, 4
bnez a4, 1b
ret
endfunc
#endif
func ff_flac_wasted32_rvv, zve32x
1:
vsetvli t0, a2, e32, m8, ta, ma
vle32.v v8, (a0)
sub a2, a2, t0
vsll.vx v8, v8, a1
vse32.v v8, (a0)
sh2add a0, t0, a0
bnez a2, 1b
ret
endfunc
func ff_flac_wasted33_rvv, zve64x
srli t0, a2, 5
li t1, 1
bnez t0, 2f
sll a2, t1, a2
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v8, (a1)
sub a3, a3, t0
vwmulsu.vx v16, v8, a2
sh2add a1, t0, a1
vse64.v v16, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
2: // Pessimistic case: wasted >= 32
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v8, (a1)
sub a3, a3, t0
vwcvtu.x.x.v v16, v8
sh2add a1, t0, a1
vsetvli zero, zero, e64, m8, ta, ma
vsll.vx v16, v16, a2
vse64.v v16, (a0)
sh3add a0, t0, a0
bnez a3, 2b
ret
endfunc
#if (__riscv_xlen == 64)
func ff_flac_decorrelate_indep2_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m8, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v8, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v8, v8, a4
vsetvli zero, zero, e16, m4, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v20, v8
vsseg2e16.v v16, (a0)
sh2add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep4_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v4, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vle32.v v8, (t1)
sh2add t1, t0, t1
vsll.vx v4, v4, a4
vle32.v v12, (t2)
sh2add t2, t0, t2
vsll.vx v8, v8, a4
vsll.vx v12, v12, a4
vsetvli zero, zero, e16, m2, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v18, v4
vncvt.x.x.w v20, v8
vncvt.x.x.w v22, v12
vsseg4e16.v v16, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep6_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld t3, 32(a1)
ld t4, 40(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m2, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v2, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vle32.v v4, (t1)
sh2add t1, t0, t1
vsll.vx v2, v2, a4
vle32.v v6, (t2)
sh2add t2, t0, t2
vsll.vx v4, v4, a4
vle32.v v8, (t3)
sh2add t3, t0, t3
vsll.vx v6, v6, a4
vle32.v v10, (t4)
sh2add t4, t0, t4
vsll.vx v8, v8, a4
slli t0, t0, 2
vsll.vx v10, v10, a4
sh1add t0, t0, t0 // t0 *= 3
vsetvli zero, zero, e16, m1, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v17, v2
vncvt.x.x.w v18, v4
vncvt.x.x.w v19, v6
vncvt.x.x.w v20, v8
vncvt.x.x.w v21, v10
vsseg6e16.v v16, (a0)
add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep8_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld t3, 32(a1)
ld t4, 40(a1)
ld t5, 48(a1)
ld t6, 56(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m2, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v2, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
vle32.v v4, (t1)
sh2add a2, t0, a2
vsll.vx v2, v2, a4
sh2add t1, t0, t1
vle32.v v6, (t2)
vsll.vx v4, v4, a4
sh2add t2, t0, t2
vle32.v v8, (t3)
sh2add t3, t0, t3
vsll.vx v6, v6, a4
vle32.v v10, (t4)
sh2add t4, t0, t4
vsll.vx v8, v8, a4
vle32.v v12, (t5)
sh2add t5, t0, t5
vsll.vx v10, v10, a4
vle32.v v14, (t6)
sh2add t6, t0, t6
vsll.vx v12, v12, a4
slli t0, t0, 4
vsll.vx v14, v14, a4
vsetvli zero, zero, e16, m1, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v17, v2
vncvt.x.x.w v18, v4
vncvt.x.x.w v19, v6
vncvt.x.x.w v20, v8
vncvt.x.x.w v21, v10
vncvt.x.x.w v22, v12
vncvt.x.x.w v23, v14
vsseg8e16.v v16, (a0)
add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_ls_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m8, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v8, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v8, v8, a4
vsub.vv v8, v0, v8
vsetvli zero, zero, e16, m4, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v20, v8
vsseg2e16.v v16, (a0)
sh2add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_rs_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m8, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v8, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v8, v8, a4
vadd.vv v0, v0, v8
vsetvli zero, zero, e16, m4, ta, ma
vncvt.x.x.w v16, v0
vncvt.x.x.w v20, v8
vsseg2e16.v v16, (a0)
sh2add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_ms_16_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m8, ta, ma
vle32.v v8, (a2)
sub a3, a3, t0
vle32.v v0, (a1)
sh2add a1, t0, a1
vsra.vi v16, v8, 1
sh2add a2, t0, a2
vsub.vv v24, v0, v16
vadd.vv v16, v24, v8
vsll.vx v8, v24, a4
vsll.vx v0, v16, a4
vsetvli zero, zero, e16, m4, ta, ma
vncvt.x.x.w v0, v0
vncvt.x.x.w v4, v8
vsseg2e16.v v0, (a0)
sh2add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep2_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v4, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v4, v4, a4
vsseg2e32.v v0, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep4_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m2, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v2, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vle32.v v4, (t1)
sh2add t1, t0, t1
vsll.vx v2, v2, a4
vle32.v v6, (t2)
sh2add t2, t0, t2
vsll.vx v4, v4, a4
slli t0, t0, 4
vsll.vx v6, v6, a4
vsseg4e32.v v0, (a0)
add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep6_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld t3, 32(a1)
ld t4, 40(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m1, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v1, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vle32.v v2, (t1)
sh2add t1, t0, t1
vsll.vx v1, v1, a4
vle32.v v3, (t2)
sh2add t2, t0, t2
vsll.vx v2, v2, a4
vle32.v v4, (t3)
sh2add t3, t0, t3
vsll.vx v3, v3, a4
vle32.v v5, (t4)
sh2add t4, t0, t4
vsll.vx v4, v4, a4
slli t0, t0, 3
vsll.vx v5, v5, a4
sh1add t0, t0, t0 // t0 *= 3
vsseg6e32.v v0, (a0)
add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_indep8_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld t1, 16(a1)
ld t2, 24(a1)
ld t3, 32(a1)
ld t4, 40(a1)
ld t5, 48(a1)
ld t6, 56(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m1, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v1, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
vle32.v v2, (t1)
sh2add a2, t0, a2
vsll.vx v1, v1, a4
sh2add t1, t0, t1
vle32.v v3, (t2)
vsll.vx v2, v2, a4
sh2add t2, t0, t2
vle32.v v4, (t3)
sh2add t3, t0, t3
vsll.vx v3, v3, a4
vle32.v v5, (t4)
sh2add t4, t0, t4
vsll.vx v4, v4, a4
vle32.v v6, (t5)
sh2add t5, t0, t5
vsll.vx v5, v5, a4
vle32.v v7, (t6)
sh2add t6, t0, t6
vsll.vx v6, v6, a4
slli t0, t0, 5
vsll.vx v7, v7, a4
vsseg8e32.v v0, (a0)
add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_ls_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v4, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v4, v4, a4
vsub.vv v4, v0, v4
vsseg2e32.v v0, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_rs_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v0, (a1)
sub a3, a3, t0
vle32.v v4, (a2)
sh2add a1, t0, a1
vsll.vx v0, v0, a4
sh2add a2, t0, a2
vsll.vx v4, v4, a4
vadd.vv v0, v0, v4
vsseg2e32.v v0, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
endfunc
func ff_flac_decorrelate_ms_32_rvv, zve32x
ld a0, (a0)
ld a2, 8(a1)
ld a1, (a1)
1:
vsetvli t0, a3, e32, m4, ta, ma
vle32.v v4, (a2)
sub a3, a3, t0
vle32.v v0, (a1)
sh2add a1, t0, a1
vsra.vi v8, v4, 1
sh2add a2, t0, a2
vsub.vv v12, v0, v8
vadd.vv v8, v12, v4
vsll.vx v4, v12, a4
vsll.vx v0, v8, a4
vsseg2e32.v v0, (a0)
sh3add a0, t0, a0
bnez a3, 1b
ret
endfunc
#endif
|
