| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | riscv/intmath: use builtins for counting ones | Rémi Denis-Courmont | 2023-05-02 | 1 | -26/+4 |
| * | riscv/bswap: use compiler builtins | Rémi Denis-Courmont | 2023-05-02 | 1 | -47/+5 |
| * | riscv: fix scalar product initialisation | Rémi Denis-Courmont | 2022-10-13 | 1 | -1/+1 |
| * | lavu/riscv: helper macro for VTYPE encoding | Rémi Denis-Courmont | 2022-10-10 | 1 | -0/+75 |
| * | lavu/riscv: CPU flag for the Zbb extension | Rémi Denis-Courmont | 2022-10-05 | 1 | -0/+6 |
| * | riscv: remove unnecessary #include's | Rémi Denis-Courmont | 2022-10-05 | 3 | -4/+0 |
| * | lavu/riscv: helper to read the vector length | Rémi Denis-Courmont | 2022-09-28 | 1 | -0/+45 |
| * | lavu/fixeddsp: RISC-V V butterflies_fixed | Rémi Denis-Courmont | 2022-09-27 | 3 | -1/+81 |
| * | lavu/floatdsp: RISC-V V scalarproduct_float | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+22 |
| * | lavu/floatdsp: RISC-V V vector_fmul_window | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+36 |
| * | lavu/floatdsp: RISC-V V vector_fmul_reverse | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+24 |
| * | lavu/floatdsp: RISC-V V butterflies_float | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+20 |
| * | lavu/floatdsp: RISC-V V vector_fmul_add | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+22 |
| * | lavu/floatdsp: RISC-V V vector_dmac_scalar | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+21 |
| * | lavu/floatdsp: RISC-V V vector_fmac_scalar | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+22 |
| * | lavu/floatdsp: RISC-V V vector_dmul | Rémi Denis-Courmont | 2022-09-27 | 2 | -1/+22 |
| * | lavu/floatdsp: RISC-V V vector_fmul | Rémi Denis-Courmont | 2022-09-27 | 2 | -1/+22 |
| * | lavu/floatdsp: RISC-V V vector_dmul_scalar | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+23 |
| * | lavu/floatdsp: RISC-V V vector_fmul_scalar | Rémi Denis-Courmont | 2022-09-27 | 3 | -1/+81 |
| * | lavu/riscv: fallback macros for SH{1, 2, 3}ADD | Rémi Denis-Courmont | 2022-09-27 | 1 | -0/+19 |
| * | lavu/cpu: CPU flags for the RISC-V Vector extension | Rémi Denis-Courmont | 2022-09-27 | 1 | -0/+19 |
| * | lavu/riscv: initial common header for assembler macros | Rémi Denis-Courmont | 2022-09-27 | 1 | -0/+77 |
| * | lavu/cpu: detect RISC-V base extensions | Rémi Denis-Courmont | 2022-09-27 | 2 | -0/+57 |
| * | lavu/riscv: fix off-by-one in bit-magnitude clip | Rémi Denis-Courmont | 2022-09-15 | 1 | -2/+2 |
| * | lavu/riscv: fix av_clip_int16 | Rémi Denis-Courmont | 2022-09-14 | 1 | -2/+2 |
| * | lavu/riscv: add <intmath.h> optimisations | Rémi Denis-Courmont | 2022-09-13 | 1 | -0/+103 |
| * | lavu/riscv: byte-swap operations | Rémi Denis-Courmont | 2022-09-13 | 1 | -0/+74 |
| * | lavu/riscv: AV_READ_TIME cycle counter | Rémi Denis-Courmont | 2022-09-13 | 1 | -0/+53 |
