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authorRémi Denis-Courmont <remi@remlab.net>2024-09-01 16:35:16 +0300
committerRémi Denis-Courmont <remi@remlab.net>2024-09-04 22:04:11 +0300
commitd9f594209fb1a9c87017034f943dcb311a9d2896 (patch)
treeec9fb69200e51615899f80a86b0c886724459038 /tests
parent27d28b68daae0f67db776896ddca5c76b07c519e (diff)
downloadffmpeg-d9f594209fb1a9c87017034f943dcb311a9d2896.tar.gz
checkasm/riscv: print official extension names
Diffstat (limited to 'tests')
-rw-r--r--tests/checkasm/checkasm.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 965e1f5a2e..73a998ae3a 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -320,13 +320,13 @@ static const struct {
#elif ARCH_RISCV
{ "RVI", "rvi", AV_CPU_FLAG_RVI },
{ "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED },
- { "RVBbasic", "rvb_b", AV_CPU_FLAG_RVB_BASIC },
+ { "RV_zbb", "rvb_b", AV_CPU_FLAG_RVB_BASIC },
{ "RVB", "rvb", AV_CPU_FLAG_RVB },
- { "RVVi32", "rvv_i32", AV_CPU_FLAG_RVV_I32 },
- { "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 },
- { "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },
- { "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 },
- { "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
+ { "RV_zve32x","rvv_i32", AV_CPU_FLAG_RVV_I32 },
+ { "RV_zve32f","rvv_f32", AV_CPU_FLAG_RVV_F32 },
+ { "RV_zve64x","rvv_i64", AV_CPU_FLAG_RVV_I64 },
+ { "RV_zve64d","rvv_f64", AV_CPU_FLAG_RVV_F64 },
+ { "RV_zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
#elif ARCH_MIPS
{ "MMI", "mmi", AV_CPU_FLAG_MMI },
{ "MSA", "msa", AV_CPU_FLAG_MSA },