aboutsummaryrefslogtreecommitdiffstats
path: root/tests
diff options
context:
space:
mode:
authorTimo Rothenpieler <timo@rothenpieler.org>2022-08-09 22:16:50 +0200
committerTimo Rothenpieler <timo@rothenpieler.org>2022-08-19 22:09:36 +0200
commitcb8ad005bb73b1adf0d36eeb794c4c375fd3ee12 (patch)
tree2c8e552c20075b2da7dc536d139c3307026f163b /tests
parentb42925264a910e6807e9e7134feaa44ae47bf911 (diff)
downloadffmpeg-cb8ad005bb73b1adf0d36eeb794c4c375fd3ee12.tar.gz
avutil/half2float: adjust conversion of NaN
IEEE-754 differentiates two different kind of NaNs. Quiet and Signaling ones. They are differentiated by the MSB of the mantissa. For whatever reason, actual hardware conversion of half to single always sets the signaling bit to 1 if the mantissa is != 0, and to 0 if it's 0. So our code has to follow suite or fate-testing hardware float16 will be impossible.
Diffstat (limited to 'tests')
-rw-r--r--tests/ref/fate/exr-rgb-scanline-zip-half-0x0-0xFFFF2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/ref/fate/exr-rgb-scanline-zip-half-0x0-0xFFFF b/tests/ref/fate/exr-rgb-scanline-zip-half-0x0-0xFFFF
index b6201116fe..e45a40b498 100644
--- a/tests/ref/fate/exr-rgb-scanline-zip-half-0x0-0xFFFF
+++ b/tests/ref/fate/exr-rgb-scanline-zip-half-0x0-0xFFFF
@@ -3,4 +3,4 @@
#codec_id 0: rawvideo
#dimensions 0: 256x256
#sar 0: 1/1
-0, 0, 0, 1, 786432, 0x1445e411
+0, 0, 0, 1, 786432, 0xce9be2be