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| author | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-19 22:44:21 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-25 23:09:58 +0300 |
| commit | 45d7078a21823ef0734a84514c8221da569009cb (patch) | |
| tree | c54d14d99132a9411dbadf78a795ba007bcf679a /tests | |
| parent | 529d4230123dbb33a719a4d5ec7e47567f04cd06 (diff) | |
| download | ffmpeg-45d7078a21823ef0734a84514c8221da569009cb.tar.gz | |
lavu/riscv: add CPU flag for B bit manipulations
The B extension was finally ratified in May 2024, encompassing:
- Zba (addresses),
- Zbb (basics) and
- Zbs (single bits).
It does not include Zbc (base-2 polynomials).
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/checkasm/checkasm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index de0024099a..016f2329b0 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -295,6 +295,7 @@ static const struct { { "RVD", "rvd", AV_CPU_FLAG_RVD }, { "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR }, { "RVBbasic", "rvb_b", AV_CPU_FLAG_RVB_BASIC }, + { "RVB", "rvb", AV_CPU_FLAG_RVB }, { "RVVi32", "rvv_i32", AV_CPU_FLAG_RVV_I32 }, { "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 }, { "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 }, |