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authorJames Cowgill <james410@cowgill.org.uk>2015-02-26 13:42:52 +0000
committerMichael Niedermayer <michaelni@gmx.at>2015-02-26 16:40:34 +0100
commitb9de1303a6414174ab2f3bccefa801bfabcf0f88 (patch)
treeabcd5107936b080b33084f4032c8fb48610318d3 /tests/ref/fate/h264-conformance-frext-pph422i7_panasonic_a
parentf6bf745c5c2a79644064dc7a7b28da4a7d44854a (diff)
downloadffmpeg-b9de1303a6414174ab2f3bccefa801bfabcf0f88.tar.gz
mips/acelp_filters: fix incorrect register constraint
Change register constraint on the v variable from = to +. This was causing GCC to think that the v variable was never read and therefore not initialize it. This fixes about 20 fate failures on mips64el. Signed-off-by: James Cowgill <james410@cowgill.org.uk> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'tests/ref/fate/h264-conformance-frext-pph422i7_panasonic_a')
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