diff options
| author | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-25 23:20:05 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-08-01 22:56:50 +0300 |
| commit | 1b2a925e94c772c59a88c03c1654bddf6aff0ca2 (patch) | |
| tree | a07f3107112ef39e8b11443bcf3eb6af3c168b92 /tests/checkasm/checkasm.c | |
| parent | 2f083fd5817f99e9874acf4fd04e6b4a7c47bb86 (diff) | |
| download | ffmpeg-1b2a925e94c772c59a88c03c1654bddf6aff0ca2.tar.gz | |
lavc/riscv: drop probing for F & D extensions
F and D extensions are included in all RISC-V application profiles ever
made (so starting from RV64GC a.k.a. RVA20). Realistically they need to be
selected at compilation time.
Currently, there are no consumers for these two flags. If there is ever a
need to reintroduce F- or D-specific optimisations, we can always use
__riscv_f or __riscv_d compiler predefined macros respectively.
Diffstat (limited to 'tests/checkasm/checkasm.c')
| -rw-r--r-- | tests/checkasm/checkasm.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index 016f2329b0..49b47f8615 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -291,8 +291,6 @@ static const struct { #elif ARCH_RISCV { "RVI", "rvi", AV_CPU_FLAG_RVI }, { "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED }, - { "RVF", "rvf", AV_CPU_FLAG_RVF }, - { "RVD", "rvd", AV_CPU_FLAG_RVD }, { "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR }, { "RVBbasic", "rvb_b", AV_CPU_FLAG_RVB_BASIC }, { "RVB", "rvb", AV_CPU_FLAG_RVB }, |