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authorAndreas Cadhalpun <Andreas.Cadhalpun@googlemail.com>2016-12-16 02:29:56 +0100
committerAndreas Cadhalpun <Andreas.Cadhalpun@googlemail.com>2017-01-26 02:22:09 +0100
commit884cd3caa5cc111daaa4ff2ca05c99e05a713e47 (patch)
tree32b44a906898cadc2de05038a702bfccf81fb1cd /libswscale/x86/hscale_fast_bilinear_simd.c
parentcc662476031b168a398d48fa6c6fc4a5f08fe4fa (diff)
downloadffmpeg-884cd3caa5cc111daaa4ff2ca05c99e05a713e47.tar.gz
swscale: save ebx register when it is not available
Configure checks if the ebx register can be used for asm and it has to be saved if and only if this is not the case. Without this the build fails when configuring with --toolchain=hardened --disable-pic on i386 using gcc 4.8: error: PIC register clobbered by '%ebx' in 'asm' In that case gcc 4.8 reserves the ebx register for the GOT needed for PIE, so it can't be used in asm directly. Reviewed-by: Michael Niedermayer <michael@niedermayer.cc> Signed-off-by: Andreas Cadhalpun <Andreas.Cadhalpun@googlemail.com> (cherry picked from commit 319438e2f206036ee0cddf401dd50f3b2a3ae117) Signed-off-by: Andreas Cadhalpun <Andreas.Cadhalpun@googlemail.com>
Diffstat (limited to 'libswscale/x86/hscale_fast_bilinear_simd.c')
-rw-r--r--libswscale/x86/hscale_fast_bilinear_simd.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/libswscale/x86/hscale_fast_bilinear_simd.c b/libswscale/x86/hscale_fast_bilinear_simd.c
index 2cba5f0a1c..60a2cbfc50 100644
--- a/libswscale/x86/hscale_fast_bilinear_simd.c
+++ b/libswscale/x86/hscale_fast_bilinear_simd.c
@@ -199,7 +199,7 @@ void ff_hyscale_fast_mmxext(SwsContext *c, int16_t *dst,
#if ARCH_X86_64
uint64_t retsave;
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
uint64_t ebxsave;
#endif
#endif
@@ -209,7 +209,7 @@ void ff_hyscale_fast_mmxext(SwsContext *c, int16_t *dst,
"mov -8(%%rsp), %%"FF_REG_a" \n\t"
"mov %%"FF_REG_a", %5 \n\t" // retsave
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
"mov %%"FF_REG_b", %5 \n\t" // ebxsave
#endif
#endif
@@ -255,7 +255,7 @@ void ff_hyscale_fast_mmxext(SwsContext *c, int16_t *dst,
"mov %5, %%"FF_REG_a" \n\t"
"mov %%"FF_REG_a", -8(%%rsp) \n\t"
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
"mov %5, %%"FF_REG_b" \n\t"
#endif
#endif
@@ -264,12 +264,12 @@ void ff_hyscale_fast_mmxext(SwsContext *c, int16_t *dst,
#if ARCH_X86_64
,"m"(retsave)
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
,"m" (ebxsave)
#endif
#endif
: "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D
-#if ARCH_X86_64 || !defined(PIC)
+#if ARCH_X86_64 || HAVE_EBX_AVAILABLE
,"%"FF_REG_b
#endif
);
@@ -289,7 +289,7 @@ void ff_hcscale_fast_mmxext(SwsContext *c, int16_t *dst1, int16_t *dst2,
#if ARCH_X86_64
DECLARE_ALIGNED(8, uint64_t, retsave);
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
DECLARE_ALIGNED(8, uint64_t, ebxsave);
#endif
#endif
@@ -298,7 +298,7 @@ void ff_hcscale_fast_mmxext(SwsContext *c, int16_t *dst1, int16_t *dst2,
"mov -8(%%rsp), %%"FF_REG_a" \n\t"
"mov %%"FF_REG_a", %7 \n\t" // retsave
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
"mov %%"FF_REG_b", %7 \n\t" // ebxsave
#endif
#endif
@@ -332,7 +332,7 @@ void ff_hcscale_fast_mmxext(SwsContext *c, int16_t *dst1, int16_t *dst2,
"mov %7, %%"FF_REG_a" \n\t"
"mov %%"FF_REG_a", -8(%%rsp) \n\t"
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
"mov %7, %%"FF_REG_b" \n\t"
#endif
#endif
@@ -341,12 +341,12 @@ void ff_hcscale_fast_mmxext(SwsContext *c, int16_t *dst1, int16_t *dst2,
#if ARCH_X86_64
,"m"(retsave)
#else
-#if defined(PIC)
+#if !HAVE_EBX_AVAILABLE
,"m" (ebxsave)
#endif
#endif
: "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D
-#if ARCH_X86_64 || !defined(PIC)
+#if ARCH_X86_64 || HAVE_EBX_AVAILABLE
,"%"FF_REG_b
#endif
);