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authorRémi Denis-Courmont <remi@remlab.net>2024-11-17 11:15:01 +0200
committerRémi Denis-Courmont <remi@remlab.net>2024-11-18 20:04:38 +0200
commite29432e6bbb6184d3ff2c7d1e070e9424cb25fe6 (patch)
tree13b5da22853395a6573a9a8c3f8b75cccdcdfed6 /libavutil
parent970d57988d2031b86bd457f4d2ef6bf73810fd13 (diff)
downloadffmpeg-e29432e6bbb6184d3ff2c7d1e070e9424cb25fe6.tar.gz
lavu/riscv: fix compilation without Vector support
The half-baked assembler in Clang 16 and earlier can't process our RISC-V assembler. This adds yet another work around that. If you must use Clang, please use version 17 or later.
Diffstat (limited to 'libavutil')
-rw-r--r--libavutil/riscv/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/libavutil/riscv/cpu.h b/libavutil/riscv/cpu.h
index 191e4478c5..f2e6b7b430 100644
--- a/libavutil/riscv/cpu.h
+++ b/libavutil/riscv/cpu.h
@@ -56,7 +56,6 @@ static inline size_t ff_get_rv_vlenb(void)
".option pop\n" : "=r" (vlenb));
return vlenb;
}
-#endif
/**
* Checks that the vector bit-size is at least the given value.
@@ -78,3 +77,4 @@ static inline bool ff_rv_vlen_least(unsigned int bits)
return bits <= (8 * ff_get_rv_vlenb());
}
#endif
+#endif /* HAVE_RVV */