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| author | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-25 23:20:05 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-08-01 22:56:50 +0300 |
| commit | 1b2a925e94c772c59a88c03c1654bddf6aff0ca2 (patch) | |
| tree | a07f3107112ef39e8b11443bcf3eb6af3c168b92 /libavutil/riscv | |
| parent | 2f083fd5817f99e9874acf4fd04e6b4a7c47bb86 (diff) | |
| download | ffmpeg-1b2a925e94c772c59a88c03c1654bddf6aff0ca2.tar.gz | |
lavc/riscv: drop probing for F & D extensions
F and D extensions are included in all RISC-V application profiles ever
made (so starting from RV64GC a.k.a. RVA20). Realistically they need to be
selected at compilation time.
Currently, there are no consumers for these two flags. If there is ever a
need to reintroduce F- or D-specific optimisations, we can always use
__riscv_f or __riscv_d compiler predefined macros respectively.
Diffstat (limited to 'libavutil/riscv')
| -rw-r--r-- | libavutil/riscv/cpu.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c index e035f4b024..6537e91965 100644 --- a/libavutil/riscv/cpu.c +++ b/libavutil/riscv/cpu.c @@ -58,8 +58,6 @@ int ff_get_cpu_flags_riscv(void) if (__riscv_hwprobe(pairs, FF_ARRAY_ELEMS(pairs), 0, NULL, 0) == 0) { if (pairs[0].value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA) ret |= AV_CPU_FLAG_RVI; - if (pairs[1].value & RISCV_HWPROBE_IMA_FD) - ret |= AV_CPU_FLAG_RVF | AV_CPU_FLAG_RVD; #ifdef RISCV_HWPROBE_IMA_V if (pairs[1].value & RISCV_HWPROBE_IMA_V) ret |= AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64 @@ -96,10 +94,6 @@ int ff_get_cpu_flags_riscv(void) if (hwcap & HWCAP_RV('I')) ret |= AV_CPU_FLAG_RVI; - if (hwcap & HWCAP_RV('F')) - ret |= AV_CPU_FLAG_RVF; - if (hwcap & HWCAP_RV('D')) - ret |= AV_CPU_FLAG_RVD; if (hwcap & HWCAP_RV('B')) ret |= AV_CPU_FLAG_RVB_ADDR | AV_CPU_FLAG_RVB_BASIC | AV_CPU_FLAG_RVB; @@ -114,12 +108,6 @@ int ff_get_cpu_flags_riscv(void) #ifdef __riscv_i ret |= AV_CPU_FLAG_RVI; #endif -#if defined (__riscv_flen) && (__riscv_flen >= 32) - ret |= AV_CPU_FLAG_RVF; -#if (__riscv_flen >= 64) - ret |= AV_CPU_FLAG_RVD; -#endif -#endif #ifdef __riscv_zba ret |= AV_CPU_FLAG_RVB_ADDR; |