aboutsummaryrefslogtreecommitdiffstats
path: root/libavutil/cpu.h
diff options
context:
space:
mode:
authorRĂ©mi Denis-Courmont <remi@remlab.net>2022-09-26 17:52:25 +0300
committerLynne <dev@lynne.ee>2022-09-27 13:19:52 +0200
commit0c0a3deb1826638915775daa7cefb891a300060b (patch)
treed3a0dfdf84e60d72174d5399e8c3fe89b17c0352 /libavutil/cpu.h
parent1edac8eb468cb9a769ded6197dbce515b71b137e (diff)
downloadffmpeg-0c0a3deb1826638915775daa7cefb891a300060b.tar.gz
lavu/cpu: CPU flags for the RISC-V Vector extension
RVV defines a total of 12 different extensions, including: - 5 different instruction subsets: - Zve32x: 8-, 16- and 32-bit integers, - Zve32f: Zve32x plus single precision floats, - Zve64x: Zve32x plus 64-bit integers, - Zve64f: Zve32f plus Zve64x, - Zve64d: Zve64f plus double precision floats. - 6 different vector lengths: - Zvl32b (embedded only), - Zvl64b (embedded only), - Zvl128b, - Zvl256b, - Zvl512b, - Zvl1024b, - and the V extension proper: equivalent to Zve64f and Zvl128b. In total, there are 6 different possible sets of supported instructions (including the empty set), but for convenience we allocate one bit for each type sets: up-to-32-bit ints (RVV_I32), floats (RVV_F32), 64-bit ints (RVV_I64) and doubles (RVV_F64). Whence the vector size is needed, it can be retrieved by reading the unprivileged read-only vlenb CSR. This should probably be a separate helper macro if needed at a later point.
Diffstat (limited to 'libavutil/cpu.h')
-rw-r--r--libavutil/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 9aae2ccc7a..18f42af015 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -82,6 +82,10 @@
#define AV_CPU_FLAG_RVI (1 << 0) ///< I (full GPR bank)
#define AV_CPU_FLAG_RVF (1 << 1) ///< F (single precision FP)
#define AV_CPU_FLAG_RVD (1 << 2) ///< D (double precision FP)
+#define AV_CPU_FLAG_RVV_I32 (1 << 3) ///< Vectors of 8/16/32-bit int's */
+#define AV_CPU_FLAG_RVV_F32 (1 << 4) ///< Vectors of float's */
+#define AV_CPU_FLAG_RVV_I64 (1 << 5) ///< Vectors of 64-bit int's */
+#define AV_CPU_FLAG_RVV_F64 (1 << 6) ///< Vectors of double's
/**
* Return the flags which specify extensions supported by the CPU.