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authorMåns Rullgård <mans@mansr.com>2009-09-26 19:23:25 +0000
committerMåns Rullgård <mans@mansr.com>2009-09-26 19:23:25 +0000
commitb9b1ad9cd863f925302cf3f67c885b1caac82341 (patch)
tree726748db770e34c6785ff1a2c1f63104c05026e9 /libavcodec
parent13d41a194e3da2e2a9c64f772b44d703733dbc08 (diff)
downloadffmpeg-b9b1ad9cd863f925302cf3f67c885b1caac82341.tar.gz
ARM: NEON optimised vector_fmul_reverse
Originally committed as revision 20029 to svn://svn.ffmpeg.org/ffmpeg/trunk
Diffstat (limited to 'libavcodec')
-rw-r--r--libavcodec/arm/dsputil_neon.c3
-rw-r--r--libavcodec/arm/dsputil_neon_s.S24
2 files changed, 27 insertions, 0 deletions
diff --git a/libavcodec/arm/dsputil_neon.c b/libavcodec/arm/dsputil_neon.c
index 2ec50a1004..024bb9727c 100644
--- a/libavcodec/arm/dsputil_neon.c
+++ b/libavcodec/arm/dsputil_neon.c
@@ -171,6 +171,8 @@ void ff_butterflies_float_neon(float *v1, float *v2, int len);
float ff_scalarproduct_float_neon(const float *v1, const float *v2, int len);
void ff_int32_to_float_fmul_scalar_neon(float *dst, const int *src,
float mul, int len);
+void ff_vector_fmul_reverse_neon(float *dst, const float *src0,
+ const float *src1, int len);
void ff_float_to_int16_neon(int16_t *, const float *, long);
void ff_float_to_int16_interleave_neon(int16_t *, const float **, long, int);
@@ -287,6 +289,7 @@ void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
c->butterflies_float = ff_butterflies_float_neon;
c->scalarproduct_float = ff_scalarproduct_float_neon;
c->int32_to_float_fmul_scalar = ff_int32_to_float_fmul_scalar_neon;
+ c->vector_fmul_reverse = ff_vector_fmul_reverse_neon;
c->vector_fmul_sv_scalar[0] = ff_vector_fmul_sv_scalar_2_neon;
c->vector_fmul_sv_scalar[1] = ff_vector_fmul_sv_scalar_4_neon;
diff --git a/libavcodec/arm/dsputil_neon_s.S b/libavcodec/arm/dsputil_neon_s.S
index 8fd055abbd..7c8328313e 100644
--- a/libavcodec/arm/dsputil_neon_s.S
+++ b/libavcodec/arm/dsputil_neon_s.S
@@ -1051,3 +1051,27 @@ NOVFP len .req r3
bx lr
.unreq len
.endfunc
+
+function ff_vector_fmul_reverse_neon, export=1
+ add r2, r2, r3, lsl #2
+ sub r2, r2, #32
+ mov r12, #-32
+ vld1.32 {q0-q1}, [r1,:128]!
+ vld1.32 {q2-q3}, [r2,:128], r12
+1: pld [r1, #32]
+ vrev64.32 q3, q3
+ vmul.f32 d16, d0, d7
+ vmul.f32 d17, d1, d6
+ pld [r2, #-32]
+ vrev64.32 q2, q2
+ vmul.f32 d18, d2, d5
+ vmul.f32 d19, d3, d4
+ subs r3, r3, #8
+ beq 2f
+ vld1.32 {q0-q1}, [r1,:128]!
+ vld1.32 {q2-q3}, [r2,:128], r12
+ vst1.32 {q8-q9}, [r0,:128]!
+ b 1b
+2: vst1.32 {q8-q9}, [r0,:128]!
+ bx lr
+ .endfunc