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| author | Andreas Rheinhardt <andreas.rheinhardt@outlook.com> | 2022-06-20 03:07:41 +0200 |
|---|---|---|
| committer | Andreas Rheinhardt <andreas.rheinhardt@outlook.com> | 2022-06-22 13:39:44 +0200 |
| commit | 61e3cccd367a1daf4aedffa65f5be038aa5cebe1 (patch) | |
| tree | fa6225a08397cb39aeabe05fad64a1c16b68a4c4 /libavcodec/x86/dcadsp.asm | |
| parent | 8360354ae81982d6510fa54979c23f714b0790e2 (diff) | |
| download | ffmpeg-61e3cccd367a1daf4aedffa65f5be038aa5cebe1.tar.gz | |
avcodec/x86/dcadsp: Remove obsolete SSE function
The only systems which benefit from ff_lfe_fir0_float_sse are truely
ancient 32bit x86s as all other systems use at least the SSE2 versions
(this includes all x64 cpus (which is why this code is restricted
to x86-32)).
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
Diffstat (limited to 'libavcodec/x86/dcadsp.asm')
| -rw-r--r-- | libavcodec/x86/dcadsp.asm | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/libavcodec/x86/dcadsp.asm b/libavcodec/x86/dcadsp.asm index 055361a765..de9fd6f346 100644 --- a/libavcodec/x86/dcadsp.asm +++ b/libavcodec/x86/dcadsp.asm @@ -42,22 +42,13 @@ cglobal lfe_fir0_float, 4, 6, 12 + cpuflag(fma3)*4, samples, lfe, coeff, nblocks cvtdq2ps m5, [lfeq ] shufps m7, m4, m4, q0123 shufps m6, m5, m5, q0123 -%elif cpuflag(sse2) +%else movu m4, [lfeq+16] movu m5, [lfeq ] cvtdq2ps m4, m4 cvtdq2ps m5, m5 pshufd m7, m4, q0123 pshufd m6, m5, q0123 -%else - cvtpi2ps m4, [lfeq+16] - cvtpi2ps m0, [lfeq+24] - cvtpi2ps m5, [lfeq ] - cvtpi2ps m1, [lfeq+8 ] - shufps m4, m0, q1010 - shufps m5, m1, q1010 - shufps m7, m4, m4, q0123 - shufps m6, m5, m5, q0123 %endif .inner_loop: @@ -206,10 +197,6 @@ cglobal lfe_fir0_float, 4, 6, 12 + cpuflag(fma3)*4, samples, lfe, coeff, nblocks RET %endmacro -%if ARCH_X86_32 -INIT_XMM sse -LFE_FIR0_FLOAT -%endif INIT_XMM sse2 LFE_FIR0_FLOAT %if HAVE_AVX_EXTERNAL @@ -235,7 +222,7 @@ cglobal lfe_fir1_float, 4, 6, 10, samples, lfe, coeff, nblocks, cnt1, cnt2 %if cpuflag(avx) cvtdq2ps m4, [lfeq] shufps m5, m4, m4, q0123 -%elif cpuflag(sse2) +%else movu m4, [lfeq] cvtdq2ps m4, m4 pshufd m5, m4, q0123 |