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authorsunyuechi <sunyuechi@iscas.ac.cn>2023-12-29 13:27:31 +0800
committerRémi Denis-Courmont <remi@remlab.net>2024-01-17 17:49:54 +0200
commit8e23ebe6f971ec4177be73b453960d83c264b7b5 (patch)
tree466360196f187ed28540a18d0ba7cd821a408203 /libavcodec/riscv
parentd595e0a0b6d1998a4e7367958dceec217041c98e (diff)
downloadffmpeg-8e23ebe6f971ec4177be73b453960d83c264b7b5.tar.gz
lavc/svq1enc: R-V V ssd_int8_vs_int16
C908 ssd_int8_vs_int16_c: 207.7 ssd_int8_vs_int16_rvv_i32: 14.2 Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
Diffstat (limited to 'libavcodec/riscv')
-rw-r--r--libavcodec/riscv/Makefile2
-rw-r--r--libavcodec/riscv/svqenc_init.c41
-rw-r--r--libavcodec/riscv/svqenc_rvv.S43
3 files changed, 86 insertions, 0 deletions
diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
index aa758eba1c..fe604a1156 100644
--- a/libavcodec/riscv/Makefile
+++ b/libavcodec/riscv/Makefile
@@ -42,6 +42,8 @@ RVV-OBJS-$(CONFIG_OPUS_DECODER) += riscv/opusdsp_rvv.o
OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_init.o
RV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvi.o
RVV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvv.o
+OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_init.o
+RVV-OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_rvv.o
OBJS-$(CONFIG_TAK_DECODER) += riscv/takdsp_init.o
RVV-OBJS-$(CONFIG_TAK_DECODER) += riscv/takdsp_rvv.o
OBJS-$(CONFIG_UTVIDEO_DECODER) += riscv/utvideodsp_init.o
diff --git a/libavcodec/riscv/svqenc_init.c b/libavcodec/riscv/svqenc_init.c
new file mode 100644
index 0000000000..f4c398960c
--- /dev/null
+++ b/libavcodec/riscv/svqenc_init.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2023 Institue of Software Chinese Academy of Sciences (ISCAS).
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "config.h"
+
+#include "libavutil/attributes.h"
+#include "libavutil/cpu.h"
+#include "libavcodec/svq1encdsp.h"
+
+int ff_ssd_int8_vs_int16_rvv(const int8_t *pix1, const int16_t *pix2,
+ intptr_t size);
+
+av_cold void ff_svq1enc_init_riscv(SVQ1EncDSPContext *c)
+{
+#if HAVE_RVV
+ int flags = av_get_cpu_flags();
+
+ if (flags & AV_CPU_FLAG_RVV_I32) {
+ if (flags & AV_CPU_FLAG_RVB_ADDR) {
+ c->ssd_int8_vs_int16 = ff_ssd_int8_vs_int16_rvv;
+ }
+ }
+#endif
+}
diff --git a/libavcodec/riscv/svqenc_rvv.S b/libavcodec/riscv/svqenc_rvv.S
new file mode 100644
index 0000000000..cfc27154dd
--- /dev/null
+++ b/libavcodec/riscv/svqenc_rvv.S
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2023 Institue of Software Chinese Academy of Sciences (ISCAS).
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "libavutil/riscv/asm.S"
+
+func ff_ssd_int8_vs_int16_rvv, zve32x
+ vsetvli t0, zero, e32, m8, ta, ma
+ vmv.v.x v24, zero
+1:
+ vsetvli t0, a2, e8, m2, tu, ma
+ vle16.v v8, (a1)
+ sub a2, a2, t0
+ vle8.v v0, (a0)
+ vwsub.wv v16, v8, v0
+ vsetvli zero, zero, e16, m4, tu, ma
+ add a0, a0, t0
+ vwmacc.vv v24, v16, v16
+ sh1add a1, t0, a1
+ bnez a2, 1b
+ vsetvli zero, zero, e32, m8, ta, ma
+ vmv.s.x v0, zero
+ vredsum.vs v0, v24, v0
+ vmv.x.s a0, v0
+
+ ret
+endfunc