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| author | Rémi Denis-Courmont <remi@remlab.net> | 2024-05-11 18:49:59 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-05-14 19:50:00 +0300 |
| commit | 9d3f561721cd710bf403af991a0e36ccc9e8d8c8 (patch) | |
| tree | ca0006f44854cbb20b5951a868bb9f2b62b59d08 /libavcodec/riscv/vp8dsp_init.c | |
| parent | b410439263e1018912581c8ff672e3f0ed800875 (diff) | |
| download | ffmpeg-9d3f561721cd710bf403af991a0e36ccc9e8d8c8.tar.gz | |
lavc/vp8dsp: restrict RVI optimisations
They are actually awfully slow if the CPU does not support misaligned
accesses natively, so only use them if misaligned accesses are fast.
Diffstat (limited to 'libavcodec/riscv/vp8dsp_init.c')
| -rw-r--r-- | libavcodec/riscv/vp8dsp_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libavcodec/riscv/vp8dsp_init.c b/libavcodec/riscv/vp8dsp_init.c index 39dc9a1b9d..31e8227fa4 100644 --- a/libavcodec/riscv/vp8dsp_init.c +++ b/libavcodec/riscv/vp8dsp_init.c @@ -45,7 +45,7 @@ av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c) { #if HAVE_RV int flags = av_get_cpu_flags(); - if (flags & AV_CPU_FLAG_RVI) { + if (flags & AV_CPU_FLAG_RV_MISALIGNED) { #if __riscv_xlen >= 64 c->put_vp8_epel_pixels_tab[0][0][0] = ff_put_vp8_pixels16_rvi; c->put_vp8_epel_pixels_tab[1][0][0] = ff_put_vp8_pixels8_rvi; |