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| author | Rémi Denis-Courmont <remi@remlab.net> | 2022-09-23 18:09:54 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-30 18:41:51 +0300 |
| commit | 262168b04e6807fce6a78507c14cfc166ba72845 (patch) | |
| tree | b5f9dc5883161891837b72b3ba1ce787afd21870 /libavcodec/riscv/sbrdsp_init.c | |
| parent | 4570b9f3c4e64a996bcadc5af58574f7f32ee1de (diff) | |
| download | ffmpeg-262168b04e6807fce6a78507c14cfc166ba72845.tar.gz | |
lavc/videodsp: RISC-V zicbop prefetch
There are currently no ways to run-time detect the CPU capability, so we
take it for granted (in the worst case, it will execute NOPs).
Diffstat (limited to 'libavcodec/riscv/sbrdsp_init.c')
0 files changed, 0 insertions, 0 deletions