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authorRémi Denis-Courmont <[email protected]>2024-07-27 14:30:17 +0300
committerRémi Denis-Courmont <[email protected]>2024-08-05 21:16:26 +0300
commit616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f (patch)
tree363eb43806c2eaa3d6090d12f0393efb5b254377 /libavcodec/riscv/opusdsp_init.c
parentcb31f17ca8f0338c2e00ac956a28a74c4d030a90 (diff)
lavc/riscv: depend on RVB and simplify accordingly
There is no known (real) hardware with V and without the complete B extension. B was indeed required in the RISC-V application profile from 2022, earlier than V. There should not be any relevant hardware in the future either. In practice, different R-V Vector optimisations in FFmpeg already depend on every constituent of the B extension anyhow, so it would not work well.
Diffstat (limited to 'libavcodec/riscv/opusdsp_init.c')
-rw-r--r--libavcodec/riscv/opusdsp_init.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/libavcodec/riscv/opusdsp_init.c b/libavcodec/riscv/opusdsp_init.c
index 88d8e77f0e..7ec261493b 100644
--- a/libavcodec/riscv/opusdsp_init.c
+++ b/libavcodec/riscv/opusdsp_init.c
@@ -32,8 +32,7 @@ av_cold void ff_opus_dsp_init_riscv(OpusDSP *d)
#if HAVE_RVV
int flags = av_get_cpu_flags();
- if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB_ADDR) &&
- (flags & AV_CPU_FLAG_RVB_BASIC))
+ if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB))
d->postfilter = ff_opus_postfilter_rvv;
#endif
}