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author | Rémi Denis-Courmont <remi@remlab.net> | 2024-07-27 14:30:17 +0300 |
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committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-08-05 21:16:26 +0300 |
commit | 616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f (patch) | |
tree | 363eb43806c2eaa3d6090d12f0393efb5b254377 /libavcodec/riscv/lpc_init.c | |
parent | cb31f17ca8f0338c2e00ac956a28a74c4d030a90 (diff) | |
download | ffmpeg-616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f.tar.gz |
lavc/riscv: depend on RVB and simplify accordingly
There is no known (real) hardware with V and without the complete B
extension. B was indeed required in the RISC-V application profile from
2022, earlier than V. There should not be any relevant hardware in the
future either.
In practice, different R-V Vector optimisations in FFmpeg already depend on
every constituent of the B extension anyhow, so it would not work well.
Diffstat (limited to 'libavcodec/riscv/lpc_init.c')
-rw-r--r-- | libavcodec/riscv/lpc_init.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/libavcodec/riscv/lpc_init.c b/libavcodec/riscv/lpc_init.c index d9bcbbe604..b093271071 100644 --- a/libavcodec/riscv/lpc_init.c +++ b/libavcodec/riscv/lpc_init.c @@ -33,11 +33,10 @@ av_cold void ff_lpc_init_riscv(LPCContext *c) #if HAVE_RVV && (__riscv_xlen >= 64) int flags = av_get_cpu_flags(); - if ((flags & AV_CPU_FLAG_RVV_F64) && (flags & AV_CPU_FLAG_RVB_ADDR)) { + if ((flags & AV_CPU_FLAG_RVV_F64) && (flags & AV_CPU_FLAG_RVB)) { c->lpc_apply_welch_window = ff_lpc_apply_welch_window_rvv; - if ((flags & AV_CPU_FLAG_RVB_BASIC) && - ff_get_rv_vlenb() > c->max_order) + if (ff_get_rv_vlenb() > c->max_order) c->lpc_compute_autocorr = ff_lpc_compute_autocorr_rvv; } #endif |