diff options
| author | Rémi Denis-Courmont <[email protected]> | 2024-07-27 14:30:17 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <[email protected]> | 2024-08-05 21:16:26 +0300 |
| commit | 616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f (patch) | |
| tree | 363eb43806c2eaa3d6090d12f0393efb5b254377 /libavcodec/riscv/h264dsp_init.c | |
| parent | cb31f17ca8f0338c2e00ac956a28a74c4d030a90 (diff) | |
lavc/riscv: depend on RVB and simplify accordingly
There is no known (real) hardware with V and without the complete B
extension. B was indeed required in the RISC-V application profile from
2022, earlier than V. There should not be any relevant hardware in the
future either.
In practice, different R-V Vector optimisations in FFmpeg already depend on
every constituent of the B extension anyhow, so it would not work well.
Diffstat (limited to 'libavcodec/riscv/h264dsp_init.c')
| -rw-r--r-- | libavcodec/riscv/h264dsp_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libavcodec/riscv/h264dsp_init.c b/libavcodec/riscv/h264dsp_init.c index 7f787d8f57..b99c0124ee 100644 --- a/libavcodec/riscv/h264dsp_init.c +++ b/libavcodec/riscv/h264dsp_init.c @@ -128,7 +128,7 @@ av_cold void ff_h264dsp_init_riscv(H264DSPContext *dsp, const int bit_depth, if (bit_depth == depth) { \ if (zvl128b) \ dsp->h264_idct_add = ff_h264_idct_add_##depth##_rvv; \ - if (flags & AV_CPU_FLAG_RVB_ADDR) \ + if (flags & AV_CPU_FLAG_RVB) \ dsp->h264_idct8_add = ff_h264_idct8_add_##depth##_rvv; \ if (zvl128b && (flags & AV_CPU_FLAG_RVB)) { \ dsp->h264_idct_dc_add = ff_h264_idct4_dc_add_##depth##_rvv; \ |