diff options
| author | Rémi Denis-Courmont <[email protected]> | 2024-07-27 14:30:17 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <[email protected]> | 2024-08-05 21:16:26 +0300 |
| commit | 616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f (patch) | |
| tree | 363eb43806c2eaa3d6090d12f0393efb5b254377 /libavcodec/riscv/flacdsp_init.c | |
| parent | cb31f17ca8f0338c2e00ac956a28a74c4d030a90 (diff) | |
lavc/riscv: depend on RVB and simplify accordingly
There is no known (real) hardware with V and without the complete B
extension. B was indeed required in the RISC-V application profile from
2022, earlier than V. There should not be any relevant hardware in the
future either.
In practice, different R-V Vector optimisations in FFmpeg already depend on
every constituent of the B extension anyhow, so it would not work well.
Diffstat (limited to 'libavcodec/riscv/flacdsp_init.c')
| -rw-r--r-- | libavcodec/riscv/flacdsp_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libavcodec/riscv/flacdsp_init.c b/libavcodec/riscv/flacdsp_init.c index 861276be28..2689ebf2dc 100644 --- a/libavcodec/riscv/flacdsp_init.c +++ b/libavcodec/riscv/flacdsp_init.c @@ -70,10 +70,10 @@ av_cold void ff_flacdsp_init_riscv(FLACDSPContext *c, enum AVSampleFormat fmt, #if HAVE_RVV int flags = av_get_cpu_flags(); - if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { int vlenb = ff_get_rv_vlenb(); - if ((flags & AV_CPU_FLAG_RVB_BASIC) && vlenb >= 16) { + if (vlenb >= 16) { c->lpc16 = ff_flac_lpc16_rvv; # if (__riscv_xlen >= 64) |