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| author | Rémi Denis-Courmont <remi@remlab.net> | 2023-07-16 15:08:08 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2023-07-19 19:29:35 +0300 |
| commit | b6585eb04c0f63f231ed16266c6ad893522dc750 (patch) | |
| tree | bc10e79af8332dd8c925a5fafa5546450c3e3b88 /libavcodec/riscv/bswapdsp_init.c | |
| parent | 98e4dd39c5d59d62f61f48f6e4a0192f6b46e5aa (diff) | |
| download | ffmpeg-b6585eb04c0f63f231ed16266c6ad893522dc750.tar.gz | |
lavu: add/use flag for RISC-V Zba extension
The code was blindly assuming that Zbb or V implied Zba. While the
earlier is practically always true, the later broke some QEMU setups,
as V was introduced earlier than Zba.
Diffstat (limited to 'libavcodec/riscv/bswapdsp_init.c')
| -rw-r--r-- | libavcodec/riscv/bswapdsp_init.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/libavcodec/riscv/bswapdsp_init.c b/libavcodec/riscv/bswapdsp_init.c index abe84ec1f7..6ad63e3805 100644 --- a/libavcodec/riscv/bswapdsp_init.c +++ b/libavcodec/riscv/bswapdsp_init.c @@ -31,16 +31,18 @@ void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len); av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c) { - int cpu_flags = av_get_cpu_flags(); + int flags = av_get_cpu_flags(); + if (flags & AV_CPU_FLAG_RVB_ADDR) { #if (__riscv_xlen >= 64) - if (cpu_flags & AV_CPU_FLAG_RVB_BASIC) - c->bswap_buf = ff_bswap32_buf_rvb; + if (flags & AV_CPU_FLAG_RVB_BASIC) + c->bswap_buf = ff_bswap32_buf_rvb; #endif #if HAVE_RVV - if (cpu_flags & AV_CPU_FLAG_RVV_I32) { - c->bswap_buf = ff_bswap32_buf_rvv; - c->bswap16_buf = ff_bswap16_buf_rvv; - } + if (flags & AV_CPU_FLAG_RVV_I32) { + c->bswap_buf = ff_bswap32_buf_rvv; + c->bswap16_buf = ff_bswap16_buf_rvv; + } #endif + } } |