Merge commit '054013a0fc6f2b52c60cee3e051be8cc7f82cef3'

* commit '054013a0fc6f2b52c60cee3e051be8cc7f82cef3':
  dsputil: Move APE-specific bits into apedsp

Conflicts:
	libavcodec/arm/int_neon.S
	libavcodec/x86/dsputil.asm

Merged-by: Michael Niedermayer <michaelni@gmx.at>

1 files changed, 77 insertions, 0 deletions

diff --git a/libavcodec/ppc/apedsp_altivec.c b/libavcodec/ppc/apedsp_altivec.c
new file mode 100644
index 0000000000..f97cf5526b
--- /dev/null
+++ b/libavcodec/ppc/apedsp_altivec.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2007 Luca Barbato <lu_zero@gentoo.org>
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "config.h"
+#if HAVE_ALTIVEC_H
+#include <altivec.h>
+#endif
+
+#include "libavutil/attributes.h"
+#include "libavutil/ppc/types_altivec.h"
+#include "libavcodec/apedsp.h"
+
+#if HAVE_ALTIVEC
+static int32_t scalarproduct_and_madd_int16_altivec(int16_t *v1,
+                                                    const int16_t *v2,
+                                                    const int16_t *v3,
+                                                    int order, int mul)
+{
+    LOAD_ZERO;
+    vec_s16 *pv1 = (vec_s16 *) v1;
+    register vec_s16 muls = { mul, mul, mul, mul, mul, mul, mul, mul };
+    register vec_s16 t0, t1, i0, i1, i4;
+    register vec_s16 i2 = vec_ld(0, v2), i3 = vec_ld(0, v3);
+    register vec_s32 res = zero_s32v;
+    register vec_u8 align = vec_lvsl(0, v2);
+    int32_t ires;
+
+    order >>= 4;
+    do {
+        i1     = vec_ld(16, v2);
+        t0     = vec_perm(i2, i1, align);
+        i2     = vec_ld(32, v2);
+        t1     = vec_perm(i1, i2, align);
+        i0     = pv1[0];
+        i1     = pv1[1];
+        res    = vec_msum(t0, i0, res);
+        res    = vec_msum(t1, i1, res);
+        i4     = vec_ld(16, v3);
+        t0     = vec_perm(i3, i4, align);
+        i3     = vec_ld(32, v3);
+        t1     = vec_perm(i4, i3, align);
+        pv1[0] = vec_mladd(t0, muls, i0);
+        pv1[1] = vec_mladd(t1, muls, i1);
+        pv1   += 2;
+        v2    += 16;
+        v3    += 16;
+    } while (--order);
+    res = vec_splat(vec_sums(res, zero_s32v), 3);
+    vec_ste(res, 0, &ires);
+
+    return ires;
+}
+#endif /* HAVE_ALTIVEC */
+
+av_cold void ff_apedsp_init_ppc(APEDSPContext *c)
+{
+#if HAVE_ALTIVEC
+    c->scalarproduct_and_madd_int16 = scalarproduct_and_madd_int16_altivec;
+#endif /* HAVE_ALTIVEC */
+}