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authorHenrik Gramner <henrik@gramner.com>2013-09-11 17:49:29 +0200
committerDerek Buitenhuis <derek.buitenhuis@gmail.com>2013-10-07 06:27:38 -0400
commit3e2fa991db7ef172579422accd61624d52777e5a (patch)
treeda09818dc3b7c1c4c01e47944ad758a9bba106be /libavcodec/mjpegbdec.c
parent71155665414b551ad350622d5abed20e58371fbf (diff)
downloadffmpeg-3e2fa991db7ef172579422accd61624d52777e5a.tar.gz
x86inc: remove misaligned cpu flag
Prevents a crash if the misaligned exception mask bit is cleared for some reason. Misaligned SSE functions are only used on AMD Phenom CPUs and the benefit is miniscule. They also require modifying the MXCSR control register and by removing those functions we can get rid of that complexity altogether. Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
Diffstat (limited to 'libavcodec/mjpegbdec.c')
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