avutil/mips: refactor msa load and store macros.

Replace STnxm_UB and LDnxm_SH with new macros ST_{H/W/D}{1/2/4/8}.
The old macros are difficult to use because they don't follow the same parameter passing rules.
Changing details as following:
1. remove LD4x4_SH.
2. replace ST2x4_UB with ST_H4.
3. replace ST4x2_UB with ST_W2.
4. replace ST4x4_UB with ST_W4.
5. replace ST4x8_UB with ST_W8.
6. replace ST6x4_UB with ST_W2 and ST_H2.
7. replace ST8x1_UB with ST_D1.
8. replace ST8x2_UB with ST_D2.
9. replace ST8x4_UB with ST_D4.
10. replace ST8x8_UB with ST_D8.
11. replace ST12x4_UB with ST_D4 and ST_W4.

Examples of new macro: ST_H4(in, idx0, idx1, idx2, idx3, pdst, stride)
ST_H4 store four half-word elements in vector 'in' to pdst with stride.
About the macro name:
1) 'ST' means store operation.
2) 'H/W/D' means type of vector element is 'half-word/word/double-word'.
3) Number '1/2/4/8' means how many elements will be stored.
About the macro parameter:
1) 'in0, in1...' 128-bits vector.
2) 'idx0, idx1...' elements index.
3) 'pdst' destination pointer to store to
4) 'stride' stride of each store operation.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>

1 files changed, 4 insertions, 2 deletions

diff --git a/libavcodec/mips/vp8_idct_msa.c b/libavcodec/mips/vp8_idct_msa.c
index 11ac9ff83e..ae6fec0d60 100644
--- a/libavcodec/mips/vp8_idct_msa.c
+++ b/libavcodec/mips/vp8_idct_msa.c
@@ -76,7 +76,8 @@ void ff_vp8_idct_add_msa(uint8_t *dst, int16_t input[16], ptrdiff_t stride)
     res2 = CLIP_SW_0_255(res2);
     res3 = CLIP_SW_0_255(res3);
     VSHF_B2_SB(res0, res1, res2, res3, mask, mask, dest0, dest1);
-    ST4x4_UB(dest0, dest1, 0, 1, 0, 1, dst, stride);
+    ST_W2(dest0, 0, 1, dst, stride);
+    ST_W2(dest1, 0, 1, dst + 2 * stride, stride);
 
     memset(input, 0, 4 * 4 * sizeof(*input));
 }
@@ -97,7 +98,8 @@ void ff_vp8_idct_dc_add_msa(uint8_t *dst, int16_t in_dc[16], ptrdiff_t stride)
     ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
     CLIP_SH4_0_255(res0, res1, res2, res3);
     VSHF_B2_SB(res0, res1, res2, res3, mask, mask, dest0, dest1);
-    ST4x4_UB(dest0, dest1, 0, 1, 0, 1, dst, stride);
+    ST_W2(dest0, 0, 1, dst, stride);
+    ST_W2(dest1, 0, 1, dst + 2 * stride, stride);
 
     in_dc[0] = 0;
 }