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| author | Vicente Olivert Riera <Vincent.Riera@imgtec.com> | 2016-04-26 12:17:14 +0530 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2016-04-26 12:27:39 +0200 |
| commit | a5638dbfbafd9162a201692b4b76981180c87d34 (patch) | |
| tree | 77c9adbf30deb011f078593d8362afa6ea8775db /libavcodec/mips/fft_mips.c | |
| parent | 666754c665713d02750fa8b882627602e589ebce (diff) | |
| download | ffmpeg-a5638dbfbafd9162a201692b4b76981180c87d34.tar.gz | |
mips: add support for R6
Note:- backporting commit ad16eff64ba78d8dc98a8324640025c7cb2857f3 from head
Understanding the mips32r6 and mips64r6 ISAs in the configure script is
not enough. In order to have full support for MIPS R6 in FFmpeg we need
to be able to build it, and for that we need to make sure we don't use
incompatible assembler code which makes the build fail. Ifdefing the
offending code is sufficient to fix the problem.
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'libavcodec/mips/fft_mips.c')
| -rw-r--r-- | libavcodec/mips/fft_mips.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/libavcodec/mips/fft_mips.c b/libavcodec/mips/fft_mips.c index cf008c6561..3cb1a4c162 100644 --- a/libavcodec/mips/fft_mips.c +++ b/libavcodec/mips/fft_mips.c @@ -57,6 +57,7 @@ */ #if HAVE_INLINE_ASM +#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 static void ff_fft_calc_mips(FFTContext *s, FFTComplex *z) { int nbits, i, n, num_transforms, offset, step; @@ -494,6 +495,7 @@ static void ff_imdct_calc_mips(FFTContext *s, FFTSample *output, const FFTSample output[n-k-4] = output[n2+k+3]; } } +#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */ #endif /* HAVE_INLINE_ASM */ av_cold void ff_fft_init_mips(FFTContext *s) @@ -504,10 +506,12 @@ av_cold void ff_fft_init_mips(FFTContext *s) ff_init_ff_cos_tabs(16); #if HAVE_INLINE_ASM +#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 s->fft_calc = ff_fft_calc_mips; #if CONFIG_MDCT s->imdct_calc = ff_imdct_calc_mips; s->imdct_half = ff_imdct_half_mips; #endif #endif +#endif } |