avcodec/mips: loongson optimize mmi load and store operators

1.MMI_ load/store macros are defined in libavutil/mips/mmiutils.h
2.Replace some unnecessary unaligned access with aligned operator
3.The MMI_ load/store is compatible with cpu loongson2e/2f which not support instructions start with gs

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>

1 files changed, 70 insertions, 69 deletions

diff --git a/libavcodec/mips/blockdsp_mmi.c b/libavcodec/mips/blockdsp_mmi.c
index 6eb2bd7d2c..1035dbbc57 100644
--- a/libavcodec/mips/blockdsp_mmi.c
+++ b/libavcodec/mips/blockdsp_mmi.c
@@ -22,11 +22,12 @@
  */
 
 #include "blockdsp_mips.h"
-#include "libavutil/mips/asmdefs.h"
+#include "libavutil/mips/mmiutils.h"
 
 void ff_fill_block16_mmi(uint8_t *block, uint8_t value, int line_size, int h)
 {
     double ftmp[1];
+    DECLARE_VAR_ALL64;
 
     __asm__ volatile (
         "mtc1       %[value],   %[ftmp0]                                \n\t"
@@ -34,15 +35,14 @@ void ff_fill_block16_mmi(uint8_t *block, uint8_t value, int line_size, int h)
         "punpcklbh  %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "punpcklbh  %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "1:                                                             \n\t"
-        "gssdlc1    %[ftmp0],   0x07(%[block])                          \n\t"
-        "gssdrc1    %[ftmp0],   0x00(%[block])                          \n\t"
-        PTR_ADDI    "%[h],      %[h],           -0x01                   \n\t"
-        "gssdlc1    %[ftmp0],   0x0f(%[block])                          \n\t"
-        "gssdrc1    %[ftmp0],   0x08(%[block])                          \n\t"
+        MMI_SDC1(%[ftmp0], %[block], 0x00)
+        PTR_ADDI   "%[h],       %[h],           -0x01                   \n\t"
+        MMI_SDC1(%[ftmp0], %[block], 0x08)
         PTR_ADDU   "%[block],   %[block],       %[line_size]            \n\t"
         "bnez       %[h],       1b                                      \n\t"
-        : [block]"+&r"(block),              [h]"+&r"(h),
-          [ftmp0]"=&f"(ftmp[0])
+        : [ftmp0]"=&f"(ftmp[0]),
+          RESTRICT_ASM_ALL64
+          [block]"+&r"(block),              [h]"+&r"(h)
         : [value]"r"(value),                [line_size]"r"((mips_reg)line_size)
         : "memory"
     );
@@ -51,6 +51,7 @@ void ff_fill_block16_mmi(uint8_t *block, uint8_t value, int line_size, int h)
 void ff_fill_block8_mmi(uint8_t *block, uint8_t value, int line_size, int h)
 {
     double ftmp0;
+    DECLARE_VAR_ALL64;
 
     __asm__ volatile (
         "mtc1       %[value],   %[ftmp0]                                \n\t"
@@ -58,13 +59,13 @@ void ff_fill_block8_mmi(uint8_t *block, uint8_t value, int line_size, int h)
         "punpcklbh  %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "punpcklbh  %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "1:                                                             \n\t"
-        "gssdlc1    %[ftmp0],   0x07(%[block])                          \n\t"
-        "gssdrc1    %[ftmp0],   0x00(%[block])                          \n\t"
+        MMI_SDC1(%[ftmp0], %[block], 0x00)
         PTR_ADDI   "%[h],       %[h],           -0x01                   \n\t"
         PTR_ADDU   "%[block],   %[block],       %[line_size]            \n\t"
         "bnez       %[h],       1b                                      \n\t"
-        : [block]"+&r"(block),              [h]"+&r"(h),
-          [ftmp0]"=&f"(ftmp0)
+        : [ftmp0]"=&f"(ftmp0),
+          RESTRICT_ASM_ALL64
+          [block]"+&r"(block),              [h]"+&r"(h)
         : [value]"r"(value),                [line_size]"r"((mips_reg)line_size)
         : "memory"
     );
@@ -77,14 +78,14 @@ void ff_clear_block_mmi(int16_t *block)
     __asm__ volatile (
         "xor        %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "xor        %[ftmp1],   %[ftmp1],       %[ftmp1]                \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x00(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x10(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x20(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x30(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x40(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x50(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x60(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x70(%[block])          \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x00)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x10)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x20)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x30)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x40)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x50)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x60)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x70)
         : [ftmp0]"=&f"(ftmp[0]),            [ftmp1]"=&f"(ftmp[1])
         : [block]"r"(block)
         : "memory"
@@ -98,61 +99,61 @@ void ff_clear_blocks_mmi(int16_t *block)
     __asm__ volatile (
         "xor        %[ftmp0],   %[ftmp0],       %[ftmp0]                \n\t"
         "xor        %[ftmp1],   %[ftmp1],       %[ftmp1]                \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x00(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x10(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x20(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x30(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x40(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x50(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x60(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x70(%[block])          \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x00)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x10)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x20)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x30)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x40)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x50)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x60)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x70)
 
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x80(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x90(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xa0(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xb0(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xc0(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xd0(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xe0(%[block])          \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0xf0(%[block])          \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x80)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x90)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xa0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xb0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xc0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xd0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xe0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0xf0)
 
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x100(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x110(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x120(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x130(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x140(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x150(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x160(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x170(%[block])         \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x100)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x110)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x120)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x130)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x140)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x150)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x160)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x170)
 
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x180(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x190(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1a0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1b0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1c0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1d0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1e0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x1f0(%[block])         \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x180)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x190)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1a0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1b0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1c0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1d0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1e0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x1f0)
 
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x200(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x210(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x220(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x230(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x240(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x250(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x260(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x270(%[block])         \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x200)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x210)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x220)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x230)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x240)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x250)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x260)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x270)
 
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x280(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x290(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2a0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2b0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2c0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2d0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2e0(%[block])         \n\t"
-        "gssqc1     %[ftmp0],   %[ftmp1],       0x2f0(%[block])         \n\t"
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x280)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x290)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2a0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2b0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2c0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2d0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2e0)
+        MMI_SQC1(%[ftmp0], %[ftmp1], %[block], 0x2f0)
         : [ftmp0]"=&f"(ftmp[0]),            [ftmp1]"=&f"(ftmp[1])
-        : [block]"r"((mips_reg)block)
+        : [block]"r"((uint64_t *)block)
         : "memory"
     );
 }