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| author | Måns Rullgård <mans@mansr.com> | 2009-09-26 19:55:21 +0000 |
|---|---|---|
| committer | Måns Rullgård <mans@mansr.com> | 2009-09-26 19:55:21 +0000 |
| commit | f331cec47dcb177e9582937a7a96f95e3a7a0901 (patch) | |
| tree | 23cf4d5ee35008dbdf9e3c17f7586d15e3aadcc8 /libavcodec/arm | |
| parent | 0a07e9d012a8dfc37ac7777b76de5328789378cb (diff) | |
| download | ffmpeg-f331cec47dcb177e9582937a7a96f95e3a7a0901.tar.gz | |
ARM: NEON optimised vector_clipf
Originally committed as revision 20031 to svn://svn.ffmpeg.org/ffmpeg/trunk
Diffstat (limited to 'libavcodec/arm')
| -rw-r--r-- | libavcodec/arm/dsputil_neon.c | 4 | ||||
| -rw-r--r-- | libavcodec/arm/dsputil_neon_s.S | 26 |
2 files changed, 30 insertions, 0 deletions
diff --git a/libavcodec/arm/dsputil_neon.c b/libavcodec/arm/dsputil_neon.c index 024bb9727c..efe07e1172 100644 --- a/libavcodec/arm/dsputil_neon.c +++ b/libavcodec/arm/dsputil_neon.c @@ -174,6 +174,8 @@ void ff_int32_to_float_fmul_scalar_neon(float *dst, const int *src, void ff_vector_fmul_reverse_neon(float *dst, const float *src0, const float *src1, int len); +void ff_vector_clipf_neon(float *dst, const float *src, float min, float max, + int len); void ff_float_to_int16_neon(int16_t *, const float *, long); void ff_float_to_int16_interleave_neon(int16_t *, const float **, long, int); @@ -297,6 +299,8 @@ void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx) c->sv_fmul_scalar[0] = ff_sv_fmul_scalar_2_neon; c->sv_fmul_scalar[1] = ff_sv_fmul_scalar_4_neon; + c->vector_clipf = ff_vector_clipf_neon; + if (!(avctx->flags & CODEC_FLAG_BITEXACT)) { c->float_to_int16 = ff_float_to_int16_neon; c->float_to_int16_interleave = ff_float_to_int16_interleave_neon; diff --git a/libavcodec/arm/dsputil_neon_s.S b/libavcodec/arm/dsputil_neon_s.S index 7c8328313e..9ae7cf96cb 100644 --- a/libavcodec/arm/dsputil_neon_s.S +++ b/libavcodec/arm/dsputil_neon_s.S @@ -1075,3 +1075,29 @@ function ff_vector_fmul_reverse_neon, export=1 2: vst1.32 {q8-q9}, [r0,:128]! bx lr .endfunc + +function ff_vector_clipf_neon, export=1 +VFP vdup.32 q1, d0[1] +VFP vdup.32 q0, d0[0] +NOVFP vdup.32 q0, r2 +NOVFP vdup.32 q1, r3 +NOVFP ldr r2, [sp] + vld1.f32 {q2},[r1,:128]! + vmin.f32 q10, q2, q1 + vld1.f32 {q3},[r1,:128]! + vmin.f32 q11, q3, q1 +1: vmax.f32 q8, q10, q0 + vmax.f32 q9, q11, q0 + subs r2, r2, #8 + beq 2f + vld1.f32 {q2},[r1,:128]! + vmin.f32 q10, q2, q1 + vld1.f32 {q3},[r1,:128]! + vmin.f32 q11, q3, q1 + vst1.f32 {q8},[r0,:128]! + vst1.f32 {q9},[r0,:128]! + b 1b +2: vst1.f32 {q8},[r0,:128]! + vst1.f32 {q9},[r0,:128]! + bx lr + .endfunc |