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authorRémi Denis-Courmont <remi@remlab.net>2023-09-28 18:28:50 +0300
committerRémi Denis-Courmont <remi@remlab.net>2023-10-02 18:08:23 +0300
commitf3dfd4ccf2e90ff88f6f45c10754b8ee7e5d1666 (patch)
tree123d12f1cec884a09a08947e5be3f0df2bdf7af7
parent0f1336b285541b8cb04f15f6caa5b4fc450a3f79 (diff)
downloadffmpeg-f3dfd4ccf2e90ff88f6f45c10754b8ee7e5d1666.tar.gz
lavc/aacpsdsp: unroll RISC-V V hybrid_synthesis_deint
-rw-r--r--libavcodec/riscv/aacpsdsp_rvv.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/libavcodec/riscv/aacpsdsp_rvv.S b/libavcodec/riscv/aacpsdsp_rvv.S
index 007002de70..fe250cd83b 100644
--- a/libavcodec/riscv/aacpsdsp_rvv.S
+++ b/libavcodec/riscv/aacpsdsp_rvv.S
@@ -203,12 +203,12 @@ func ff_ps_hybrid_synthesis_deint_rvv, zve32x
mv t4, a4
addi a2, a2, 1
2:
- vsetvli t5, t3, e32, m1, ta, ma
+ vsetvli t5, t3, e32, m4, ta, ma
vlseg2e32.v v16, (t1)
sub t3, t3, t5
vsse32.v v16, (t0), t6
mul t2, t5, t6
- vsse32.v v17, (t4), t6
+ vsse32.v v20, (t4), t6
sh3add t1, t5, t1
add t0, t0, t2
add t4, t4, t2