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authorRémi Denis-Courmont <remi@remlab.net>2023-09-29 22:36:16 +0300
committerRémi Denis-Courmont <remi@remlab.net>2023-10-03 20:48:39 +0300
commite50f8e861ba1390e6ceab7bab591bd3bfa08ced8 (patch)
treef9717e4a34d22694459711671967ee065299aa83
parentbe37a2e3644fc3db4c297b347fba687c3ff9cca1 (diff)
downloadffmpeg-e50f8e861ba1390e6ceab7bab591bd3bfa08ced8.tar.gz
swscale/rgb2rgb: avoid S-regs in RISC-V V uyvytoyuv422
We can make do with callee-clobbered registers only now. As an added bonus, this makes the code XLEN-independent.
-rw-r--r--libswscale/riscv/rgb2rgb.c2
-rw-r--r--libswscale/riscv/rgb2rgb_rvv.S10
2 files changed, 2 insertions, 10 deletions
diff --git a/libswscale/riscv/rgb2rgb.c b/libswscale/riscv/rgb2rgb.c
index 162a4082b0..565f0b77f1 100644
--- a/libswscale/riscv/rgb2rgb.c
+++ b/libswscale/riscv/rgb2rgb.c
@@ -55,10 +55,8 @@ av_cold void rgb2rgb_init_riscv(void)
shuffle_bytes_1230 = ff_shuffle_bytes_1230_rvv;
shuffle_bytes_3012 = ff_shuffle_bytes_3012_rvv;
interleaveBytes = ff_interleave_bytes_rvv;
-#if (__riscv_xlen == 64)
uyvytoyuv422 = ff_uyvytoyuv422_rvv;
yuyvtoyuv422 = ff_yuyvtoyuv422_rvv;
-#endif
}
#endif
}
diff --git a/libswscale/riscv/rgb2rgb_rvv.S b/libswscale/riscv/rgb2rgb_rvv.S
index 3e7988ca01..3200370224 100644
--- a/libswscale/riscv/rgb2rgb_rvv.S
+++ b/libswscale/riscv/rgb2rgb_rvv.S
@@ -100,12 +100,9 @@ func ff_interleave_bytes_rvv, zve32x
ret
endfunc
-#if (__riscv_xlen == 64)
.macro yuy2_to_i422p y_shift
- addi sp, sp, -16
- sd s0, (sp)
addi a4, a4, 1
- lw s0, 16(sp)
+ lw t6, (sp)
srai a4, a4, 1 // pixel width -> chroma width
1:
mv t4, a4
@@ -131,14 +128,12 @@ endfunc
add t2, t5, t2
bnez t4, 2b
- add a3, a3, s0
+ add a3, a3, t6
add a0, a0, a6
add a1, a1, a7
add a2, a2, a7
bnez a5, 1b
- ld s0, (sp)
- addi sp, sp, 16
ret
.endm
@@ -149,4 +144,3 @@ endfunc
func ff_yuyvtoyuv422_rvv, zve32x
yuy2_to_i422p 0
endfunc
-#endif