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| author | Rémi Denis-Courmont <remi@remlab.net> | 2024-05-29 17:57:09 +0300 |
|---|---|---|
| committer | Rémi Denis-Courmont <remi@remlab.net> | 2024-05-31 22:22:43 +0300 |
| commit | 9238f6cb415d5a688e76f804e74ebddfd556bdda (patch) | |
| tree | 9802f3e3b64a6d05b118238c7ce1c9f3c906d2af | |
| parent | b1149520305839eaceeb20864f501c96d358731e (diff) | |
| download | ffmpeg-9238f6cb415d5a688e76f804e74ebddfd556bdda.tar.gz | |
lavu/float_dsp: R-V V scalarproduct_double
C908:
scalarproduct_double_c: 39.2
scalarproduct_double_rvv_f64: 10.5
X60:
scalarproduct_double_c: 35.0
scalarproduct_double_rvv_f64: 5.2
| -rw-r--r-- | libavutil/riscv/float_dsp_init.c | 3 | ||||
| -rw-r--r-- | libavutil/riscv/float_dsp_rvv.S | 21 |
2 files changed, 24 insertions, 0 deletions
diff --git a/libavutil/riscv/float_dsp_init.c b/libavutil/riscv/float_dsp_init.c index 585f237225..155496fa6b 100644 --- a/libavutil/riscv/float_dsp_init.c +++ b/libavutil/riscv/float_dsp_init.c @@ -46,6 +46,8 @@ void ff_vector_dmac_scalar_rvv(double *dst, const double *src, double mul, int len); void ff_vector_dmul_scalar_rvv(double *dst, const double *src, double mul, int len); +double ff_scalarproduct_double_rvv(const double *v1, const double *v2, + size_t len); av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp) { @@ -68,6 +70,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp) fdsp->vector_dmul = ff_vector_dmul_rvv; fdsp->vector_dmac_scalar = ff_vector_dmac_scalar_rvv; fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_rvv; + fdsp->scalarproduct_double = ff_scalarproduct_double_rvv; } } #endif diff --git a/libavutil/riscv/float_dsp_rvv.S b/libavutil/riscv/float_dsp_rvv.S index e6ec182a7a..2f0ade6db6 100644 --- a/libavutil/riscv/float_dsp_rvv.S +++ b/libavutil/riscv/float_dsp_rvv.S @@ -249,3 +249,24 @@ NOHWD mv a2, a3 ret endfunc + +func ff_scalarproduct_double_rvv, zve64f + vsetvli t0, zero, e64, m8, ta, ma + vmv.v.x v8, zero + vmv.s.x v0, zero +1: + vsetvli t0, a2, e64, m8, tu, ma + vle64.v v16, (a0) + sub a2, a2, t0 + vle64.v v24, (a1) + sh3add a0, t0, a0 + vfmacc.vv v8, v16, v24 + sh3add a1, t0, a1 + bnez a2, 1b + + vsetvli t0, zero, e64, m8, ta, ma + vfredusum.vs v0, v8, v0 + vfmv.f.s fa0, v0 +NOHWD fmv.x.w a0, fa0 + ret +endfunc |